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Original question:

UCC28C43: FLYBACK 160V to 15V DC-DC Converter: TINA SIMULATION

UCC28C43: Feedback signal

Umamaheswararao Vuyyuru
Prodigy 175 points
Part Number: UCC28C43
Other Parts Discussed in Thread: TL431

Hi Steven,

As per your suggestion, I am creating new thread. 

In the UCC28C43 datasheet, two different types of opto connections are mentioned. One is Pg22, FB pin is connected to ground and feedback is connected to COMP pin. The second one is in PG24, opto out is connected to FB pin and COMP.

I am not understanding which is better, please suggest. 

If FB is connected to ground, how output voltage is regulating. 

Thanks in advance for your suggestions. 

Thanks and Regards

Umamaheswararao

  • 0
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Figure 9.1 (pg.22):

    In this case the E/A is not used to compensate the feedback loop of the system nor regulate the output voltage. FB pin is grounded, then the output of the error amplifier (COMP pin) will source maximum current and this current will be pulled down by the BJT of the optocoupler. The E/A is acting as a current source biasing the BJT of the optocoupler. The feedback loop (Type II compensator connected at the TL431) will regulate the voltage at the COM pin through the BJT of the optocoupler to get the desired duty cycle and deliver power to the output. 

    Figure 9.3 (pg.24):

    In this case the E/A is used to regulate the output voltage. The FB pin is connected to the output of the optocoupler and the feedback loop will regulate the voltage at the COM pin through the E/A sensing the output voltage and sending the enough voltage to the FB pin.

    If you have any further questions, let me know replyign to this thread.

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel,

    Thank you for your reply. 

    Q1. Can you please tell me which is better approach to control the output voltage for 0% to 100% load variation in offline applications. 

    Q2. I want to block the pulses once the input voltage reached to some predefined value, lets say input voltage range is 60V to 160V. I want to block or switch off the pulse from UCC28C43 at 100V. As per datasheet, two ways are there to disable the IC  and given in Section 8.3..8. Please share the example schematics of two methods to disable the IC. 

    Thanks in advance for the suggestions.

    Regards

    Umamaheswararao

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Q1. I recommend using E/A as part of your feedback compensator network to regulate the output voltage. You can follow the typical application design guidelines. It gives you a good idea of how to design your power stage and feedback loop.

    Q2. To disable your circuit after Vin reaches certain voltage is more complicated than it looks as the device is not designed for a fault. Section 8.3 explains how to disable the device (pulling down COM pin or pushing high CS pin), but it does not explain how to restart the device after the fault condition is cleared. My recommendations are the following:

    a. Use a logic transistor a connected the drain to the COMP pin, the source to GND and the gate to a Schmitt trigger comparator with dual input. 

    b. One of the inputs needs to be a voltage divider coming from Vin and the other can be a voltage reference coming from a voltage divider from an external power supply.

    c. To supply the Schmitt trigger comparator you can use the external power supply too.

    I recommend Schmitt trigger comparator to be able to make the IC restart.

    As you can see an external power supply always is less convenient than just use Vref voltage from IC. You can try using Vref from IC but we do not know what will be its behavior when the device will stop switching. 

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel,

    I have done the simulation in TINA as per your suggestion. I have designed the same logic using TL431 and want to share the same through email for your verification. Can you share your email. 

    Regards

    Umamaheswararao

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Unfortunately, I cannot share my email through this forum, but I can keep supporting by here. Feel free to share your schematic and submit your questions. Thanks.

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel,

    Thank you for your reply. Here I am attaching my TINA simulation file for your verification. please suggest if any extra circuit is required. Here the controller is off above 97V and ON below 97V. 

    Regards

    Umamaheswararao

    Boost_V4.TSC

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Roy, please see my comments about your schematic:

    -VDD: Make sure 100nF decoupling cap is connected next to Vdd pin and ground pin. Is Vcc an external power supply? Where is Vg voltage source coming from? Make sure zener diode U6 is voltage rated for at least UVLO ON of VDD.

    -VREF: Make sure 100nF decoupling cap is connected next to Vref and ground pin.

    -OUT: looks good.

    -COMP and FB: Type III compensator is designed around the E/A of the IC. Connections between Vout, FB pin and COMP looks good but make sure they are designed well depending on your converter parameters. How much is Vout? What is your switching frequency? 

    -RT/CT: connections look good but make sure CT and RT are designed well for your designed oscillator and switching frequency.

    -CS: connections look good but make sure Rcs is designed for maximum peak current of MOSFET and Vcs max voltage specified in datasheet. RC filter connection looks good but make sure R and C are designed well depending on your switching frequency.

    Soft Start:

    -Emitter of PNP BJT should be connected to COMP pin and collector to ground. In this case, emitter is connected to ground and collector between R6 and C4. 

    Slope Compensation:

    -Connect an AC coupling capacitor in series with R18 to prevent adding any DC offset to the CS voltage. 10nF should be good enough. Make sure R18 is well designed depending on your slope compensation requirements.

    Shutdown of controller for Vin>87V

    The logic of your circuit is correct, and it probably works. But please keep in mind that it would dissipate a considerable amount of power that would decrease the efficiency and power density (extra space of extra components) of you converter. For example, estimating the power losses through R19 10k resistor is about 0.75W, you would try increasing that value. 

    One more time, this device is not designed for fault functioning and that is why shutting down the device adds complexity and challenges.

    If you have any further questions, please let me know replying to this thread.

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel,

    Thank you very much for the great suggestions. 

    Manuel -VDD: Make sure 100nF decoupling cap is connected next to Vdd pin and ground pin. Is Vcc an external power supply? Where is Vg voltage source coming from? Make sure zener diode U6 is voltage rated for at least UVLO ON of VDD.

    Yes, Vcc is generating from external using Link-Switch (LNK302P), This Link switch will maintain 12V output with variation of input voltage. 

    Vg (input) is coming from 110V Battery source,  

    Manuel -VREF: Make sure 100nF decoupling cap is connected next to Vref and ground pin.

    Yes, We will take care this. 

    Manuel -COMP and FB: Type III compensator is designed around the E/A of the IC. Connections between Vout, FB pin and COMP looks good but make sure they are designed well depending on your converter parameters. How much is Vout? What is your switching frequency? 

    I have updated to Type-II compensator as per the design document SLVA636 (https://www.ti.com/lit/an/slva636/slva636.pdf?ts=1696225391189&ref_url=https%253A%252F%252Fwww.google.com%252F). 

    The output Voltage is 100V, Switching frequency is 110Khz. Please suggest if any thing is missed. (attached the updated TINA file for your reference)

    Manuel --RT/CT: connections look good but make sure CT and RT are designed well for your designed oscillator and switching frequency.

    Yes, this is designed at 110kHz frequency. Rct = 15.4k, Cct = 1nF

    Manuel --CS: connections look good but make sure Rcs is designed for maximum peak current of MOSFET and Vcs max voltage specified in datasheet. RC filter connection looks good but make sure R and C are designed well depending on your switching frequency.

    The switching frequency is 110kHz, Rcsf and Ccsf is designed at 482kHz. Converter is working for these values. 

    Please suggest what is the optimal design of  Rcsf and Ccsf.

    -Emitter of PNP BJT should be connected to COMP pin and collector to ground. In this case, emitter is connected to ground and collector between R6 and C4. 

    I have updated the circuit in the attached file. Please check and suggest how to select the R and C for this soft start. 

     Manuel --Slope Compensation:

    -Connect an AC coupling capacitor in series with R18 to prevent adding any DC offset to the CS voltage. 10nF should be good enough. Make sure R18 is well designed depending on your slope compensation requirements.

    This is designed as per datasheet of UCC28C43 

    Vin min = 60V, Vout = 100V

    I peak = 3.6A,

    Rcs = 1V/3.6A = 0.2778

    D = (100-60)/100 = 0.4

    Ideal value of slope compensation factor is determined form equation (33) : M_ideal = ((1/pi)+0.5)/(1-0.4) = 1.3638

    The inductor rising slope (Sn) at the CS pin is calculated from equation (34) Sn = (60*0.2778)/100uH = 0.1667V/us

    The compensation slope (Se) is calculated with Equation (35), Se = (1.3638-1)*0.1667 = 60.6 mV/us 

    T_onmin = 0.4/110kHz = 3.636us

    From equation (37), S_osc = 1.9/3.636us = 522mV/us

    From equation (38) R_ramp is calculated with Rcsf = 3.3k is R_ramp = 1k*((522/60.6)-1) = 25k

    However, In datasheet this value is calculated for Flyback. Can I use same formals for Boost?

     Manuel -Shutdown of controller for Vin>87V

    The logic of your circuit is correct, and it probably works. But please keep in mind that it would dissipate a considerable amount of power that would decrease the efficiency and power density (extra space of extra components) of you converter. For example, estimating the power losses through R19 10k resistor is about 0.75W, you would try increasing that value. 

    Yes, I have updated to 50k. 

    Thanks in advance for your reply. Boost_V9.TSC

    Regards

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Type II compensator:

    -Because of the value of your output capacitor is very large (300uF), the single pole of the boost converter in current mode control is very low, as well as the ESR zero. This will be critical for the design of your feedback loop compensation. Please follow the guidelines of the SLVA636 document. For your converter values, I recommend to design for a crossover frequency fco=160Hz. Move the low frequency zero fz1 (R6, R4 in your schematic) to a lower value and also the high frequency pole (R6, C1 in your schematic).

    Question: Why Cout is very large? Is yuor boost converter working in CCM or DCM? What is the output power? What is the inductor current ripple?

    RC filter at CS pin:

    I recommend increasing the corner frequency of the RC filter to around 1MHz. What you can do is to make Rcs value half. RC filter helps for peaks attenuation, but a low value would affect the turn on of your device and it would lead to a poor switching behavior. 

    Slope compensation:

    Your steady state duty cycle is less than 50%, then slope compensation is not critical for your design. However, it helps for noise immunity, so your design values should be good as it is.

    The rest look good.

    If you have any further questions, please let me know replying to this thread.

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel,

    Thank you for your feedback. 

    Type II compensator:

    -Because of the value of your output capacitor is very large (300uF), the single pole of the boost converter in current mode control is very low, as well as the ESR zero. This will be critical for the design of your feedback loop compensation. Please follow the guidelines of the SLVA636 document. For your converter values, I recommend to design for a crossover frequency fco=160Hz. Move the low frequency zero fz1 (R6, R4 in your schematic) to a lower value and also the high frequency pole (R6, C1 in your schematic).

    Question: Why Cout is very large? Is yuor boost converter working in CCM or DCM? What is the output power? What is the inductor current ripple?

    Output power = 120W

    Output voltage = 100V

    Mode of Operation is CCM

    Fsw = 110khz

    I designed Cout for CCM mode of operation at 20% of rated load with 1% of output ripple voltage. Now, Cout is reduced to 200uF and ESR is 0.958R (by connecting two 100uF capacitors parallel)

    As per your suggestion, I have selected Fco = 160Hz 

    As per SLVA636 document
    R1 = 115.5e3;
    fc = 160;
    fpo = 0.1; % The first pole (fp0) of the compensator is pBoost_V11.TSClaced at the origin from an integrator.
    fp1 = 1/(2*pi*C*rC); %The second pole (fp1) of the compensator is placed coincident with the ESR zero or the
    %RHP zero frequency, which is lower.
    fz1 = fc/5; % The compensation zero (fz1) is placed at one-fifth the selected crossover frequency.
    C1 = 1/(2*pi*R1*fpo) = 13.7uF
    R2 = fpo*R1 = 11.55k
    C3 = fz1/(2*pi*R1*fpo*fp1) = 0.551uF

    I have done the simulation using these values, but the output is not reaching 100V, it is controlling around 91v. The updated TINA file is attached for your reference. Please suggest if any corrections required. 

    RC filter at CS pin:

    I recommend increasing the corner frequency of the RC filter to around 1MHz. What you can do is to make Rcs value half. RC filter helps for peaks attenuation, but a low value would affect the turn on of your device and it would lead to a poor switching behavior. 

    Updated by changing Rcsf = 3.3k, Ccsf = 50pF

    Thank you

    Regards

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Please see bellow a detailed feedback compensation loop:

    -Control to output voltage transfer function:

    fp=2/(2*pi*Cout*Rload)=19Hz

    fz_ESR=1/(2*pi*ESR*Cout)=830Hz

    fz_RHP=Rload./(2*pi*Le)=132Khz

    fsw=110Khz

    -Compensation design: fco=10Khz (~fsw/10) then fz1=2KHz and fp1=132Khz

    Setting: R2=50kohm then C1=1/(2*pi*R2*fz1)=1.59n, C3=1/(2*pi*R2)=24.11pF.

    Note: R2/R1 sets the mid frequency gain of the compensator transfer function (when the gain bode plot is flat). If you want to increase your fco you can increase R2 or decrease R1 (decreasing R1 make Rb decreasing too). 

    With those values simulation results show Vout controlled for 100V after 10ms.

    If you have any further questions, please let me know replying to this thread.

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 175 points

    Hi Manuel, 

    Thank you for the suggestions. I have updated simulations as per your calculations. The simulations is working. 

    However, as per the SLVA636 document, The second pole (fp1) of the compensator is placed coincident with the ESR zero or the
    RHP zero frequency, which is lower.

    here, the lower is fz_ESR zero i.e., 830Hz. But, in your calculations, you considered fp1 is fz_RHP. 

    I am not understanding. Can you please clear me on this point. 

    Regards

    Umamaheswararao

  • 0 in reply to Umamaheswararao Vuyyuru
    TI__Genius 15506 points

    Hi Umamaheswararao,

    Sorry for the confusion. Yes, second pole should be located coincidently with ESR zero. Please, see the corrected compensator design:

    -Control to output voltage transfer function:

    fp=2/(2*pi*Cout*Rload)=19Hz

    fz_ESR=1/(2*pi*ESR*Cout)=830Hz

    fz_RHP=Rload./(2*pi*Le)=132Khz

    fsw=110Khz

    -Compensation design: fco=500Hz  then fz1=100Hz and fp1=830Hz

    Note: fco can be less than fsw/10. The idea is that it would be located after fz1 and before fp1 (to get the maximum possible phase margin).

    Note: R2/R1 sets the mid frequency gain of the compensator transfer function (when the gain bode plot is flat). If you want to increase your fco you can increase R2 or decrease R1 (decreasing R1 make Rb decreasing too). 

    With those values simulation results show Vout controlled for 100V after 15ms.

    If you have any further questions, please let me know replying to this thread.