BQ78350-R1: CEDV/FCC not Functioning correctly

Hi Wyatt,

Sorry been out of vacation, I am not familiar with the GPCCEDV tool, would you be able to share anything that could point me in the right direction? Should I be able to just find it by googling it?

I saw some note in the  "Using the bq78350-r1" application note that talked about a GPCCHEM but that was only if you could not find your cell in the list of available cell chemistries but ours is present. I assume the GPCCEDV is a different tool but for EDV parameters instead of chemistries? I will start with looking for info on the GPCCEDV tool you mentioned, that might be what we have been missing. 

Is that tool listed anywhere in the manuals? I don't recall ever seeing it mentioned. 

That said, for this particular battery we do expect extremely consistent and low current loads and an extremely consistent temp, due to its use case, but we were hoping to achieve a generalized BMS that we could quickly adapt to many potential future packs that may not have that same consistency. 

Thank you very much for the help.

Thanks,

Tim

So one additional question came up when cycling with the fixed EDV values, we are getting correct FCC values, but we were seeing the CF flag trip every time we discharged.

I think we figured out why it was tripping every cycle, we had assumed requested learning cycle count was the number of times we needed to run a learning cycle before it drops the CF flag, however looking further into it it is the number of cycle count increases before it turns the flag back on and because we had it set to 1, as we wanted to do just a single charge discharge cycle, that instead meant as soon as the cycle count iterates during every discharge it would flip the cf flag.

Setting that to the default of 20 resolves that, but it introduced a new question. We have the cycle count iterating earlier than we would expect. We have the design capacity at 3000mah, the cct set to 0 to look at design capacity instead of FCC, and the cycle count percentage set to 90%. We would expect to see the cycle count iterate at 2700mah discharged but we are seeing it iterate earlier at only ~2300mah discharged or ~79% i cannot seem to find any other registers that affect the cycle count iteration or why this would be iterating early.

Would you be able to answer here or would i need to open a new post?

Thanks for the help.

Tim

Hello Tim,

Generally we like to keep each post separate to help others as much as possible where the topic aligns with the discussion.

But I am not aware of any other registers that would affect the cycle count incrementing.

Sincerely,

Wyatt Keller

Thanks for the info, I actually meant to reply again yesterday that i figured out the cycle count issue from a forum post about a different chip the BQ40Z50 this. The cycle count on these chips is based on total charge passed out of the pack, not per discharge charge leaving the pack. So charging and discharging small amounts repeatedly will eventually accumulate to one cycle, so because we were doing full charge discharge cycles the cycle count increments at 90% but that meant that the time in the discharge when it would increment moved up by 10% or 300mah for us every time that it was cycled. If you measured from when the cycle count tripped to the next time the cycle count tripped it would actually math the 90% of design capacity or 2700mah.