TPS28225: Output signal wrong problem.

Hi, William Moore.

Thank you for replied my question. 

In my close loop test step is:

step 1. I only turn on the power supply to gate driver, VDD=6V, and I measure the Vgs of high side MOS is 0V and  the Vgs of low side MOS is 6V.

            The Voltage of Cboot was been charged by VDD about 6.3V.(Like you shared bootstrap reference.)

step 2. Turn on Vin=24V to the power stage, because I want to make sure the Vds of Q1 is 24V that mean Q1 turn off before turn on TL494(PWM IC).

step 3. Turn on TL494(PWM IC), VCC of the TL494 was 15V, and measured Vref=5V, C1(PWM Output)=15V at initial. The C1 of TL494 connect to PWM 

            input pin of TPS28225, so the Vgs of low side MOS drop from 6V to 0V and the Vgs of high side MOS increase from 0V to 6.3V. But the Vds of

            high side MOS is still 24V, that mean Q1 always turn off. Like Figure. 2.

Above that is my buck circuit start up step. The circuit still wrong like before. If that test step are wrong or something in my circuit connect is wrong, and if you need more waveform to judge, please tell me. 

Thank you for help again,

YuHui Xiao.                 

Hey,

For step 1 and 2 your sequence is correct.

For step 3,

1. With PWM output (C1) being 15V, you are exceeding the gate driver's PWM pin absolute maximum rating of 13.2V and could be damaging the device which is causing these issues. Have you tried an ABA swap to see if this issue persists?

2. When turning on the TL494, what is the C1 output during that startup sequence, it could have a transient or unexpected output during its turn-on time.

3. Is the PWM signal changing or staying high? If so, there will not be enough drive current to keep the high-side FET on.

4. There should be a bypass capacitor on VDD that is close to the gate driver that is at least 10 times that of the bootstrap capacitor in order to help supply the transient loads. Reference section 8 Power Supply Recommendations for this.

To better understand what is going on here, please take waveform captures with probes connected at the gate driver of the following pins during this start-up scenario: PWM-VSS, BOOT-PHASE, UGATE-PHASE, VDD-VSS and LGATE-VSS.

Let me know if you have any other questions and what your findings of the above are.

Thank you,

William Moore

Hi,

The under is the answer you asked;

Q1:

A1: I made the TL494 input VCC=10V, and add the divide resistor Rpwm2=10K between TL494 PWM output and control GND. So that PWM-VSS is 5V under the gate driver's PWM pin absolute maximum rating of 13.2V. And I also tried TL494 VCC in 15V, 20V, 24V. But the results of gate driver in difference input VCC of TL494 are also like the TL494 input VCC=10V, nothing change. (Like Figure. 1.)

Q2:   

A2: When TL494 haven't turned on, only turn on gate driver, PWM already got 1.8V.(T0~T1)  But even have 1.8V the Ugate-PHASE also Low, so I it's no problem, I think. 

Q3:

A3: When PWM high, the Ugate-PHASE will become high in short period(T1~T2), but drop to 0V  instantly. Ugate-PHASE can't hold high value compare to open loop test. Maybe this is the real cause, but I don't know how to solve this problem and why it drop to 0V momently.

If I want increase drive current, can I connect C2 to C1 and E2 connect to VSS like TL494 two output connect together in parallel?

Q4:

A4: I noticed this problem, so I already change bypass capacitor to 4.7uF.

Waveform explain:

T0:No any supply at initial.

T0~T1:Provide gate driver VDD=6V.

T1:Provide power stage Vin=24V.

T1~T2:Provide TL494 VCC=10V.

note:T1~T2 Ugate-PHASE reach to 5V, but drop to 0V instantly and no any other operation, in addition to provide TL494 power.

Figure. 1.

Thank you.

YuHui Xiao 

Hey,

Thanks for providing this response and feedback.

A1: This pullup and pulldown resistor network on the PWM pin may be causing some issues. The PWM pin has an internal pullup and pulldown network as seen below. By added these values externally, you are putting the internal resistors in parallel and altering the operating on that 3-state input circuit.

A2: With V_PWM = 1.8V, you are putting this device into 3-state mode which pulls both outputs low. Then, you must provide the PWM exit sequence that is described in Section 6.3.4.1.

A3: Looking at the PWM signal once you are turning the TL494 on, the PWM signal has a long rise time that appears to be causing this issue. I am not an expert on the TL494 but it is not outputting a good PWM signal for the driver to be switching on at this point. This could be due to many factors related to that TL494 or it could also be taking a long time to charge up that 47uF capacitor. You also have not exited the 3-state mode yet, so the driver is holding the outputs low at this time due and the momentary high pulse you see could be the attempt to exit 3-state mode but with that long PWM rise time, the driver stays in PWM mode because the PWM signal is within that 3-state threshold for a long time. As for if you can combine the outputs of the TL494, I am not an expert on that product and could not tell you if that was acceptable. You would need to ask a question to that team regarding that.

A4: That should be acceptable.

Moving forward, it would be a good idea to remove the pull-up and pull-down 10kohm resistors on the PWM pin. That pull-up resistor on PWM to VCC is what is causing the PWM voltage to be higher than the expected 5V output from the controller. Also, you could try to turn on the PWM controller before the converter input to get the VCC capacitors charged up first or possibly reduce that VCC capacitor. Also, another issue that could be happening here is that the feedback that the controller is seeing is 0V because the converter is not outputting anything and so the controller does not have a reference to control for. You will need to discuss this with the TL494 team to determine what is best practice for that device.

Let me know if you have any further questions.
Thank you,
William Moore

Hey,

Have you been able to resolve this issue?

Another note on the resistor network connected to the PWM pin. Section 6.3.4.2 External Resistor Interference in the datasheet discusses this further, but if you are trying to avoid the 3-state window then a pull down resistor of 3.5 kohm or smaller can help disable the 3-state mode by shrinking the 3-state window.

Let me know what the status of this is and if you have any further questions.

Thank you,

William Moore