LM5176: layout check

Hi Gareth,

Thanks for reaching out. Could you please attach the filled out LM5176 Design Calculator for your application to this thread?
In this way we can help check your schematic in the most efficient way.

Thank you and best regards,
Bryan

Hi Bryan

The attachment is LM5176 excel, please help to confirm whether the layout needs to be adjusted.

LM5176 tools.xlsm

Hi Gareth,

we may should start with a schematic review:

-  what is indicated by the red circles?

- with the selected input and output capacitor you will not reach your target you have set in the Quickstart calculator

- for that power level you should add Gate resistors and also a placeholder for a snubber at SW1 and SW2

- VISNS resistor should be 2k

- why using 10R for connecting BIAS and VOSNS

- adding a small filter cap parallel to the low side UVLO divider can help filter noise

- why is R761 placed ?

A few comments about the layout but it might make sense to update the schematic and layout first:

- connect VCC cap to VCC and PGND pad directly

- add a ground area for AGND where all AGND components are placed in 

- common connection point for AGNDand PGND should be the thermal pad

- Kelvin connection to CS/CSG sense resistor could be better if R761 is removed

- Small current loop for HO1/SW1 could be improved

- Small current loop for HO2/SW2 could be improved

Layout hints

(1) Four-switch buck-boost layout tip No. 1: identifying the critical parts for layout

(2) Four-switch buck-boost layout tip No. 2: optimizing hot loops in the power stage

(3) Four-switch buck-boost layout tip No. 3: separating differential sense lines from power planes

(4) Four-switch buck-boost layout tip No. 4: routing gate-drive and return paths

Best regards,

 Stefan

Hi Stefan

what is indicated by the red circles?
=> That is our BOM note. Please ignore it.

- with the selected input and output capacitor you will not reach your target you have set in the Quickstart calculator
=> Attached exel file is the update Quickstart calculator with the updated schematic.
     I reduced the Max. output current to 15A.

- for that power level you should add Gate resistors and also a placeholder for a snubber at SW1 and SW2
=> add 2.2R and 1nF for SW1 and SW2

     add 0R for 4x MOSFET

- VISNS resistor should be 2k
=> modified it to 2K

- why using 10R for connecting BIAS and VOSNS
=> That's referred to other projects. I modified it to 0R.

- adding a small filter cap parallel to the low side UVLO divider can help filter noise
=> add 47pF

- why is R761 placed ?
=> That avoid layout team to route without pairing. I deleted R761 and add layout note.

LM517.xlsm

Hi Gareth,

thanks,

do you plan to provide an updated layout for the review?

If I open the previous attached layout - I only see a black screen - it looks like empty.

Best regards,

 Stefan

Hi Stefan

Could you help to check the layout. If it can't be turned on, please let me know.

0310.pdf8304.layout.brd

Hi Gareth,

sorry, i can still not open it. Which file format is this?

Best regards,

 Stefan