UCC21521: UVLO destroys the first pulses of a short tone burst on the Bootstrap capacitor on the high side output

Hi Ron,

Couple things to consider in your circuit:

• Optimal sizing and placements of decoupling capacitors
  • Consider additional smaller, high frequency capacitors in parallel to the bulk decoupling capacitors (place them closer to the pin)
• Having a low gate charge MOSFET
  • The issue with short burst pulses is when the load capacitance is not being allowed to fully charge/discharge
    • This causes hard switching within the output stage of the gate driver, inducing noise on the VDD internally (which can trigger UVLO)

How fast and at what voltage are these short tone bursts? There is likely some kind of unwanted behavior going on that is causing the VDD to dip below UVLO threshold.

Regards,

Hiroki

OUT A and OUT B in Half Bridge layout

Bootstrap cap not allowed to charge due to UVLO I believe.

The VDDa is not jumping higher than the supply when the low side FET turns on.  The Low side FET pulls the VSSa low and I believe turns on the UVLO feature in the UCC21521 driver.  I have tried different boot strap cap and resistor values and the FET gate appears to have plenty of time to charge.  I must be missing something fundamental here.  This circuit has worked in the past but now I can not get the boot strap cap to raise up after the low side FET turns off and releases ground reference of the VSSa.

If this is the 50 usec delay issue multiple cycles would eventually clear this delay correct?

This is a typical bootstrap type configuration...

Hi Ron,

I agree with your thinking about the bootstrap capacitor not being allowed to charge sufficiently after each cycle. This looks like it could be related to the bootstrap resistor or sizing of the capacitor which should be roughly 10 times greater than the gate capacitance of the high side FET.

There is a very helpful documentation to help you calculate bootstrap components to allow the circuit to work as intended.

Here is the app note:

https://www.ti.com/lit/an/slua887a/slua887a.pdf?ts=1708643478288&ref_url=https%253A%252F%252Fwww.google.com%252F

Hope this helps.

Regards,

Hiroki

Dear Hiroki,

I have been through this AP Note and it was very helpful.

I think it is time to look into an isolated supply for the high side.  The Boot Strap design will always have the charge maintenance issue.

Do you have any reference designs or AP Notes for Isolated Supplies in full bridge circuits?

Thanks,

Ron

Dear Hiroki,

I will try the PMP23223 evaluation board with the UCC14240 transformer coupled isolated power supply.  This will let me experiment with the EMI noise concern I have.

Question:  The .083Amp output is twice what I need.  Is it practical or wise to use the output for two high side FETs or is it best to use one supply for each FET?

Ron

By the way:

Since we can close this thread could I have my last name removed from the title just for privacy concerns?

Ron

Apparently the PMP23223 EVM is not available for purchase.

Is there any other EVM to let me try an isolated supply?

Thanks,

Ron