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TPS6594-Q1: The reason for not reading the register content of the TPS65941120-Q1 PMIC by I2C using TPS6594EVM tool.

Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TPS6594EVM

Hi,

  Now we develop our own board  by TPS65941120-Q1TPS65941421-Q1  and LP876411B5-Q1 PMIC.Now we can read the register content for TPS65941421-Q1  and LP876411B5-Q1 by TPS6594EVM,but can not recognize the TPS65941120-Q1 and  so can not read the register content.What is the reason for that? Now  I consider some reasons for that. 
1. The TPS65941120-Q1 peripheral circuit is problematical and the PMIC can not wok.
2. The PMIC can work, but not normally and it  enters into certain state that I2C can not work well,so we can not recognize the PMIC,but I do not know which state it is.

3.The state of the TPS65941421-Q1  and LP876411B5-Q1 PMIC can affect the PS65941120-Q1 PMIC function and make it into certain state that I2C can not work.

BR

Rata

  • Hello Rata,

    I understand how frustrating that maybe only have the 2 out of the 3 working as expected.

    Thank you for the detail on how you're connecting to the PMICs

    1. The TPS65941120-Q1 peripheral circuit is problematical and the PMIC can not wok.

    Can you send the schematic in a direct message or share what you have here to see what you mean?

    If possible can you using a logic analyzer to capture the communication between the EVM and your development board?

    2. The PMIC can work, but not normally and it  enters into certain state that I2C can not work well,so we can not recognize the PMIC,but I do not know which state it is.

    What are the voltage readings on the VINT, VOUT, VCCA on the primary PMIC?

    Are there any interrupts on the other PMICs that you can share?

    3.The state of the TPS65941421-Q1  and LP876411B5-Q1 PMIC can affect the PS65941120-Q1 PMIC function and make it into certain state that I2C can not work.

    This is true, but the same can happen if the TPS65941120 doesn't work right as it is the Main PMIC and communicates via SPMI to the other devices, hence why I have the questions above.

    BR,

    Nicholas

  • Hi Nicholas,

        Thanks for your detailed reply.

       1. Can you send the schematic in a direct message or share what you have here to see what you mean?

        Now because I dont know the reason, I guess that  the peripheral circuit is one of  the possible reasons. I don't know that whether it is or not and what problem the  peripheral circuit is.

       2.1.What are the voltage readings on the VINT, VOUT, VCCA on the primary PMIC?

       The VINT and VCCA is 3.3V,   for VOUT voltage,   LDOCTRC and LDOVINT are 1.8Vs, VOUT_LDO2  is 0.8V, others are all 0V  including SW_Bx and VOUT_LDOx. The VINT and VCCA is as belows:

     The voltage is about between 3.04V ~3.68V,will this lead to the failure?

       2.2.Are there any interrupts on the other PMICs that you can share?

       The content of the interrupts registers on the other PMICs is as belows :

    From the picture, we can see that the error is SPMI communication  error. We have tested SDATA_SPMI and SCLK_SPMI  signal by  a oscilloscope and no signal is detected on the both lines. CAN that lead to SPMI communication  error? Except that, what other faults can also cause the SPMI communication  error?  It seems that the TPS65941120 device is always in the NO SUPPLY state or BACKUP state.

    3.This is true, but the same can happen if the TPS65941120 doesn't work right as it is the Main PMIC and communicates via SPMI to the other devices, hence why I have the questions above.

    For this question, what leads that the TPS65941120 PMIC doesn't work right? Which state can lead that I2C of the TPS65941120 fails ? 

    BR

    Rata

  • Hello Rata,

       The VINT and VCCA is 3.3V,   for VOUT voltage,   LDOCTRC and LDOVINT are 1.8Vs, VOUT_LDO2  is 0.8V, others are all 0V  including SW_Bx and VOUT_LDOx. The VINT and VCCA is as belows:

     The voltage is about between 3.04V ~3.68V,will this lead to the failure?

    Yes, VCCA should be in tolerance of 10% of 3.3, those values are outside of that. Now normally, it will do a recovery attempt where it will go into the hardware SAFE state, then to INIT, then BOOT BIST, and finally into the PFSM.

    Here though it looks like VOUT_LDO2 (of TPS65941120) is 800mV, as shown below in the highlighted this LDO and the others have RV_SEL (residual voltage) which will observe the voltage on the pin and if over 150mV will trigger a fault.

    In this case it looks like it's halting the device from doing the recovery attempt, keeping the device stuck in the BOOT BIST state as there is 800mV on the line.

    My recommendation is this, find what's causing the 800mV on VOUT_LDO2 when the device has the power failure as it should not have any voltage on this line. I have tested this and saw the same issue as you, no talking on TPS65941120, but the other devices can be used with the EVM.

    For this question, what leads that the TPS65941120 PMIC doesn't work right? Which state can lead that I2C of the TPS65941120 fails ? 

    See the above.

    From the picture, we can see that the error is SPMI communication  error. We have tested SDATA_SPMI and SCLK_SPMI  signal by  a oscilloscope and no signal is detected on the both lines. CAN that lead to SPMI communication  error? Except that, what other faults can also cause the SPMI communication  error?  It seems that the TPS65941120 device is always in the NO SUPPLY state or BACKUP state.

    Yes, that can but more than likely it's the above residual voltage on LDO2. The SPMI wouldn't have anything on it as the main PMIC and main SPMI controller is not up which makes sense as to why there isn't anything on the line. In functioning SPMI you would see traffic on the line for the SPMI watchdog.

    Please try getting rid of the 800mV source of the LDO2 of TPS65941120, and see if you can talk via I2C.

    BR,

    Nicholas

  • Hi Nicholas,

       Thanks for your detailed reply. It helps us a lot.Now I also have some question.

        Question 1, you said LDO2 residual voltage is the cause.  what reasons can bring the LDO2 residual voltage?

        Now we have resolved the probem and LDO2 residual voltage has been eliminated, but at the same time some errors appeaer as belows:

     

     I find that the main errors include 1)MCU power error(MCU_PWR_ERR_INT),2)VCCA undervoltage( VCCA_UV_INT),3)LDO2 output current limit (LDO2_ILIM_INT)and 4)LDO1 output voltage has fallen belows 150mV(LDO1_SC_INT).

    What is the reasons for those errors?

       Question 2, you said 'In this case it looks like it's halting the device from doing the recovery attempt, keeping the device stuck in the BOOT BIST state as there is 800mV on the line.', but by the state diagram for device power states  in the following:

      It seems like that it keeps the device stuck in the INIT state  instead of  BOOT BIST state due to the residual voltage. Because that no residual voltage is necessary condition for entering BOOT BIST state for INIT state, is that right?

     Question 3,  the VCCA undervoltage and overvoltage problem.  VCCA voltage is about between 3.04V ~3.68V , if only this problem is present and LDO2 is 0V, we can  recongnize the TPS65941120 PMIC and read register content, but the whole function of  TPS65941120 device is not normal,  the VCCA undervoltage and overvoltage problem shoul be resolved, is that right?

    Question 4,you said 'I have tested this and saw the same issue as you, no talking on TPS65941120, but the other devices can be used with the EVM.' How did you do the test? That is to say, what did you do to make LDO2 residual voltage  more than 150mV?

    BR

    Rata

  • Hello Rata,

    Thank you for the detail of your post.

      Now we have resolved the probem and LDO2 residual voltage has been eliminated, but at the same time some errors appeaer as belows:

     

     I find that the main errors include 1)MCU power error(MCU_PWR_ERR_INT),2)VCCA undervoltage( VCCA_UV_INT),3)LDO2 output current limit (LDO2_ILIM_INT)and 4)LDO1 output voltage has fallen belows 150mV(LDO1_SC_INT).

    I'm glad that you were able to get readings back on the PMIC_A.

    Causes that give rise to residual voltage in my experience would be:

    • Excessive capacitance
    • Leakage current from other devices
    • UV/OV Condition to LDOs tied as load switches

    It looks like the cause is centered around LDO2, which is in bypass mode:

    Questions:

    How did you clear the excess voltage on LDO2?

    Did you ground it? If so, that would explain the SC & ILIM interrupts.

    Request:

    To understand what the true cause of the error, when recreating this issue, could you measure on oscilloscope (with no previous voltage applied, cold start) on TPS65941120:

    • Trigger on VCCA pin from 0V to the VCCA level of 3V3
    • LDO2
    • ENABLE
    • GPIO9 (on TPS65941120)

    If you do not have a four channel scope, but have two channels, just capture the VCCA & LDO2 please, thank you!

       Question 2, you said 'In this case it looks like it's halting the device from doing the recovery attempt, keeping the device stuck in the BOOT BIST state as there is 800mV on the line.', but by the state diagram for device power states  in the following:

      It seems like that it keeps the device stuck in the INIT state  instead of  BOOT BIST state due to the residual voltage. Because that no residual voltage is necessary condition for entering BOOT BIST state for INIT state, is that right?

    My apologies on that Rata, you are correct.

    I think of them as the same because of how fast the INIT transitions into BOOT_BIST, where the BOOT_BIST does another set of analog tests.

     Question 3,  the VCCA undervoltage and overvoltage problem.  VCCA voltage is about between 3.04V ~3.68V , if only this problem is present and LDO2 is 0V, we can  recongnize the TPS65941120 PMIC and read register content, but the whole function of  TPS65941120 device is not normal,  the VCCA undervoltage and overvoltage problem shoul be resolved, is that right?

    Absolutely should be corrected as the LDO2 of TPS65941120 is a load switch in bypass mode which has an expected output of 3V3 for the processor.

    This is why I'm asking for the scope shot above as well to confirm the root cause of the issue is the dip or over voltage in VCCA that is causing the initial issue and then being unable to recover due to the residual (possibly leakage) voltage on LDO2.

    Question 4,you said 'I have tested this and saw the same issue as you, no talking on TPS65941120, but the other devices can be used with the EVM.' How did you do the test? That is to say, what did you do to make LDO2 residual voltage  more than 150mV?

    I have an EVM stack of all three devices together and from a cold start applied the residual voltage you had seen on LDO2. I connect the GUI and was only to communicate to the two PMICs TPS65941421 & LP876411B. As soon as the residual voltage was removed, I2C communication was able to happen with TPS65941120.

    BR,

    Nicholas

  • Hi Nicholas,

        Thanks for your reply. My board can still not work well and we still have some questions.

       Q1.How did you clear the excess voltage on LDO2?Did you ground it? If so, that would explain the SC & ILIM interrupts.

        We clear the excess voltage on LDO2 by connecting an inductor 2.7uH in parallel with a 2.2uF capacitor. Is it equal to ground it? In this situation, the drive voltage of LDO2 is about 0.5V rather than 3.3V. At the same time, some errors appear as above from the registers.

       We don't know whether this solution is reasonable or not. If not, what should be done? If yes, have we chosen an unreasonable inductor value? Our board is designed totally according to  J721S2X  SOMG01EVM. Now we can still not focus the root cause of the problem, it is very frustrating!

      Q2.We have tried some other methods to solve this problem.

           a. Change 2.2uF capacitor to 1uF;

           b. Change 2.2uF capacitor to 1nF;

           c. Connect a resistor 10KΩ  in parallel with a 2.2uF capacitor;

           d.Connect a capacitor 4.7uF in parallel with a 2.2uF capacitor;

        They don't work at all and LDO2 is 0.8V and we can not perform I2C reads and writes. 

         Q3.You said "

    To understand what the true cause of the error, when recreating this issue, could you measure on oscilloscope (with no previous voltage applied, cold start) on TPS65941120:

    • Trigger on VCCA pin from 0V to the VCCA level of 3V3
    • LDO2
    • ENABLE
    • GPIO9 (on TPS65941120)If you do not have a four channel scope, but have two channels, just capture the VCCA & LDO2 please, thank you!

    "

    Here are the captures(In this situation, we have solved the VCCA under voltage prolem, and VCCA is stably 3.3V with little glitch, but LDO2 resiual voltage is still 0.8V):

    What conclusions can we draw from the pictures?

      Q4,you said "

    Causes that give rise to residual voltage in my experience would be:

    • Excessive capacitance
    • Leakage current from other devices
    • UV/OV Condition to LDOs tied as load switches

    "

      For "Excessive capacitance",we have tried different capacitors, but it seems like not this reason.Or have we chosen unreasonable capacitor values?

      For "Leakage current from other devices",  what should we do to confirm whether it is the reason?In which situations leakage current will be introduced from other devices?

      For "UV/OV Condition to LDOs tied as load switches" , I don't quitely understand the meaning of this sentence. It means that there is  an under voltage or over voltage error in the LDOS pins, is that right? What should we do to confirm this cause?

    BR

    Rata

     

     

  • Hello Rata,

        We clear the excess voltage on LDO2 by connecting an inductor 2.7uH in parallel with a 2.2uF capacitor. Is it equal to ground it? In this situation, the drive voltage of LDO2 is about 0.5V rather than 3.3V. At the same time, some errors appear as above from the registers.

       We don't know whether this solution is reasonable or not. If not, what should be done? If yes, have we chosen an unreasonable inductor value? Our board is designed totally according to  J721S2X  SOMG01EVM. Now we can still not focus the root cause of the problem, it is very frustrating!

    If I am understanding how you're were able to get rid of the residual voltage by doing this?

    Pablo Picasso HERE

    If this is what you did to get the residual voltage, then no this is not recommend, this will eventually become a short which will still trigger the issue.

    The voltage should either be 0V, 1V8, or 3V3. Not anything in between those at any steady state, I'm still convinced that this might be leakage voltage, because there shouldn't be any voltage on that rail when all others are turning off.

    Now are there any other domains being powered while this device is turning on, I would suggest that you find what is causing the leakage into this domain and that is the root of the issue.

    It is very frustrating, please if you could try turning off othered powered domains to see if the voltage goes down on VDD_MCUIO_1V8_REG, look at things that power up near here.

    What conclusions can we draw from the pictures?

    It looks like it's able to power on properly, I understand that you copied the design, but the board has gone under several revisions, please provide the schematics, if not I'm only providing guess work as GPIO9 is said to be grounded in the design and uses a different part number.

    So now it has no issuing powering up? When does the issue show up?

    "

      For "Excessive capacitance",we have tried different capacitors, but it seems like not this reason.Or have we chosen unreasonable capacitor values?

      For "Leakage current from other devices",  what should we do to confirm whether it is the reason?In which situations leakage current will be introduced from other devices?

      For "UV/OV Condition to LDOs tied as load switches" , I don't quitely understand the meaning of this sentence. It means that there is  an under voltage or over voltage error in the LDOS pins, is that right? What should we do to confirm this cause?

    Excessive capacitance, would be on the processor side (not the ones by the PMIC), but I'm doubtful of this if you're copying a design provided by a FAE (Field Applications Engineer).

    Leakage current, either through layout design of the board or through manufacturing of the board where traces (or pours) touch each other providing power to rails. Please see if there's any other 0V8 source in the board and verifying if it's on when this issue occurs, remove it and see if the residual voltage disappears (Note you may want to look at slightly higher voltages because voltage drops do happen on leakages too).

    UV/OV Condition to LDOs tied as load switches, let me explain as I understand that's a lot to unpack:

    LDO2 is by default configured as a load switch, the input is 3V3, but it still has voltage monitoring which is +/-10%, so if the voltage (at VCCA) goes higher than 3V63 it will trigger a OV fault, if less than 2V97 is will trigger a UV.

    BR,

    Nicholas

  • Hi Nichlos,

      Thanks for your reply. We still have sonme questions.

       Q1,We have solved the residual voltage problem.  As you said  the leakage voltage is the cause. But now we  encounter another problem there is no voltage on the LDOx and SW_Bx(BUCKx_OUT) pins . What is the reason for that?Is it necessary that MCU must send certain I2C command to enable these pins to produce requested voltage? Or  MCU is not necessary and the PMICs can drive these voltages by themselves?

    In the above situation, the interrupts is as belows:

    It seems llike orderly shutdown has happened. We don't know what cause the orderly shutdown.

    Q2.

     Our schematics are as belows:

    is there any error for our design?

    Q3.In our own design, current monitors circuit is deleted, which will cause that there are no voltages on the LDOx and SW_Bx? And is it  necessary for the whole function?

    BR

    Rata

  • Hello Rata,

    I'm glad the issue of the voltage on LDO2 was solved and that you're now passing the BIST. Now it looks like the issue is to find what is causing the orderly shutdown. The orderly shutdown is causing the restart attempts until the recovery counter is reached.

    Remember this is a multiple PMIC setup, please check the interrupts on the other devices as well, at the moment it looks like there are no issues with the primary (main) PMIC of TPS65941120. 

    is there any error for our design?

    None that I can see, more than anything issues like these show up in the layout or in manufacturing.

    Q3.In our own design, current monitors circuit is deleted, which will cause that there are no voltages on the LDOx and SW_Bx? And is it  necessary for the whole function?

    Could you give me the part number that was removed, but I don't think so, I'm looking back at our designs to double check.

    First let's see those other interrupts.

    BR,

    Nicholas

  • Hi Nicholas,

       Thanks very much for your help. Now all the output voltages including LDOx and SW_Bx. We have conducted some strange questions about VCCA power up.

      Question 1:

         If we power off the board, it is necessary to wait for about ten minutes or even longer , then power up the board, VCCA is 3.3V , the board can work well and all the output voltages including LDOx and SW_Bx are normally driven.

        However if we immediately power up the board after powering off it, VSYS_SENSE pin is 3.3V,but VCCA pin is about 0.7V,  all output voltages can not normally be driven,  LDO2 is 0.4V and other output voltages are all 0V.  In this condition, we can not perform any I2C read and write commands either. What is the cause for that?  

    Here is the capture on the VCCA supply pin which is finally about 0.7V:

    The ciucuit is as belows:

      Question 2:

       There is another strange phenomenon, after we power off the board, there are still  voltages on the VCCA pin and VSYS_SENSE pins, which continue to decrease from 0.7V for VCCA , from 3.3V for VSYS_SENSE,   about ten nimutes later, the VCCA voltage value can be decreased to below 0.01V. In this situation,  the board can be normally powered on. What should we do to find the  root cause for this phenomenon?

      Question 3:

       We have a third question.  In order to  solve the leakage voltage problem on LDO2 pin, we remove the resistor RD42 in the following picture.  Now the VSYS_MCUIO_3V3 is left open.We have tried to connet this signal to VSYS_3V3,but it doesn't work. Where should we connect this signal line to ?

    BR,

    Rata

       

  • Hello Rata,

      Question 1:

         If we power off the board, it is necessary to wait for about ten minutes or even longer , then power up the board, VCCA is 3.3V , the board can work well and all the output voltages including LDOx and SW_Bx are normally driven.

        However if we immediately power up the board after powering off it, VSYS_SENSE pin is 3.3V,but VCCA pin is about 0.7V,  all output voltages can not normally be driven,  LDO2 is 0.4V and other output voltages are all 0V.  In this condition, we can not perform any I2C read and write commands either. What is the cause for that?  

    Here is the capture on the VCCA supply pin which is finally about 0.7V:

    The answer to your question is no, the device shouldn't have to wait that long in order to do a restart attempt.

    Could you take a capture of VCCA & VSYS on the same scope capture, you should see a wave form of the VCCA toggling up and down, try to capture all of this. This is a FET short test.

    I'll try to get you a scope shot of the same PDN-0A and what it looks like.

      Question 2:

       There is another strange phenomenon, after we power off the board, there are still  voltages on the VCCA pin and VSYS_SENSE pins, which continue to decrease from 0.7V for VCCA , from 3.3V for VSYS_SENSE,   about ten nimutes later, the VCCA voltage value can be decreased to below 0.01V. In this situation,  the board can be normally powered on. What should we do to find the  root cause for this phenomenon?

    Let's look at the Safety FET, which does a short circuit test and see what the outcome is from that. There are capacitors on those lines to power the BUCKs and LDOs. If there is a failure that causes the device to trigger the lockout we should see this.

      Question 3:

       We have a third question.  In order to  solve the leakage voltage problem on LDO2 pin, we remove the resistor RD42 in the following picture.  Now the VSYS_MCUIO_3V3 is left open.We have tried to connet this signal to VSYS_3V3,but it doesn't work. Where should we connect this signal line to ?

    Rata, could you send me your schematic and your layout if it's not too much, you can do this in a private message.

    I can see why removing this load from the switch could change the leakage current condition. At this point, the issues aren't so much the PMIC but the layout and PCB manufacturing.

    BR,

    Nicholas

  • Rata,

    The scope shots as promised of the PDN-0A (Done on EVMs)

    Power up, see how the VSYS is toggling up and down, this is part of the FET short test, if it passes it'll will boost as expected.

    Shutdown by an abrupt VSYS power off, see how the 160mV and then tappers off to GND.

    We do expect there to be voltage on the VCCA line to the capacitors, but eventually we see it go to GND as well, but it shouldn't be an issue with some residual voltage on VCCA.

    More scope shots later in the capture w/ cursors

    BR,

    Nicholas

  • Hi Nicholas,

       Thanks for your reply.Here are captures of VCCA ,LDO2, VSYS and BUCK1234 on the same scope capture.The normal situation with these signals is as belows:

    The abnormal situation is:

    What can you obtain from the above picture?

    We send you our schematic and layout  in a private message.Please check it. May there are some questions about our design.Please correct it,thank you.

    BR

    Rata

  • Hello Rata,

    please allow me some time to look over these scope shots, but I can make the comment of:

       Thanks for your reply.Here are captures of VCCA ,LDO2, VSYS and BUCK1234 on the same scope capture.The normal situation with these signals is as belows:

    This is a normal power up in the fact the system turns on and stays on, but the dip on VSYS/VCCA and on the LDO2 means the power supply dipped too low and reset occured.

    I'll update after taking a better look at the files sent and the scope shots here.

    Thank you for your patience,

    Nicholas

  • Hi Nicholas,

       I haven't recived any message for a few days, is there any bug with our schematic and layout?

        Now I have annother question with the J721S2X  SOMG01EVM, it can not  power on the board PROC079A.The problem is as belows:

        If we use TPS65941111EVM to drive J721S2X  SOMG01EVM,  there are some fault voltages output for TPS65941421 PMIC:

    BUCK1_OUT  output is 0V  with setting value 1.8V;

    BUCK5_OUT  output is 0.78V with setting value 0.85V; 

    LDO1_OUT  output is 0.67V with setting value 0.8V;

     all the other outputs are normal.

    The timing diagram for GPIO9 and MCUIO_3V3 are as belows:

    What may be the reason for this phenomenon?Is there a problem with TPS65941421 PMIC?

    BR

    Rata

  • Hello Rata,

       I haven't recived any message for a few days, is there any bug with our schematic and layout?

    Nothing about the schematic seems amiss. As for a layout review, that will take weeks as we have a priority que for that and they take quite a bit of time. From what I'm glancing there isn't anything obvious.

        Now I have annother question with the J721S2X  SOMG01EVM, it can not  power on the board PROC079A.The problem is as belows:

        If we use TPS65941111EVM to drive J721S2X  SOMG01EVM,  there are some fault voltages output for TPS65941421 PMIC:

    Please explain to me, you have both a TPS65941111EVM and a TPS65941421 working together to power the J721S2X? Or to just read, I'm assuming that it's just to read the registers on the board. As before.

    BUCK1_OUT  output is 0V  with setting value 1.8V;

    BUCK5_OUT  output is 0.78V with setting value 0.85V; 

    LDO1_OUT  output is 0.67V with setting value 0.8V;

     all the other outputs are normal.

    Are they any of the other outputs on the TPS65941421 still outputting voltages, like for instance LDO2?

    Same question for TPS65941120, can you measure BUCK1 & BUCK4 w/ LDO1.

    I want to confirm that the device is reacting to the SoC_PWR_ERR fault.

    What may be the reason for this phenomenon?Is there a problem with TPS65941421 PMIC?

    From what it looks like it there are start up attempts. At the above guide if the VDD_MCUIO_3V3 is still having issues note that it's still part of the MCU rails and if there is any error on these rails it will be seen as an MCU_PWR_ERR which the PMIC bundle will attempt another power up.

    BR,

    Nicholas

  • Hi Nicholas,

     We use the TPS65941111EVM to read the EVM (J721S2X SOMG01EVM and J721EXCP01EVM).As following picture shows,

    From the interruption, the development board is no problem. However, the system power supply is not normal. I took 2 signals, TPS65941120-GPIO9 and VDD_MCUIO_3V3,there are start up attempts.

    I measured VDDAR_CPU_0V85 and the GND resistance at 1.4 Ohms,as the same as VDDAR_CPU_0V85.

    Help me determine if the TDA 4 chip is broken or for other reasons.

  • Hello Rata,

    due to the number of requests we are getting please expect a delay in response.

    BR,

    Nicholas

  • Hi Nicholas,

    How do you do! I have another problem, please help to see what the reason is.

    Or this plan- EVM (J721S2X SOMG01EVM and J721EXCP01EVM), our own board. When we choose the NO BOOT,

    Once pins D26, E24, C28 have any pull up, the VCCA=0,The power supply is not turned on. The TPS65941120-LDO 2 (VDD _ MCU _ GPIORET _ 3 V 3) has a voltage of about 1.3V.

    The pins D26, E24, C28 of Power are all supplied by VDDSHV0 _ MCU.Is this the reason why the power supply does not work properly?

    How to solve this problem? Thank you very march!

    BR,

    Rongqin

  • Hello Rongqin,

    Yes, this would be the reason as to why the PMIC wouldn't function properly as there shouldn't be little to no voltage on these lines.

    As having this residual voltage will throw an error and the PMIC will not start. If the PMIC is not on, but other parts of the board are, then this seems like a leakage issue still.

    BR,

    Nicholas