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TPS65994AE: TPS65994AE Configuration settings

Part Number: TPS65994AE

We are using the TPS65994AE on a Raptor Lake platform.  Using the GUI, I've set the GPIO Config register under Port 1 seeting to control power to the retimer and to reset the retimer.  What other key configuration settings are needed to work with a Burnside Bridge retimer?  

  • Hi Jose,

    You can check if the following settings are set correctly like below:

    0x43 Delay Config Register

    0x52 TBT Config Register

    0x64 I2C Controller Config Register

    Configure Target Address TBT 1 with the correct address.

    GPIO settings should be ok, just make sure they match the RPL reference design you are using.

    Let me know if you have additional questions.

    Best,

    Alex

  • Thanks for replying.  I verified all of the settings from above.  These are all the default settings that come up when I start a new project with the TPS65994AE.  I've tried to use this image (with the updated GPIO settings using the GPIO Config register), and saved it as a binary image.  This was then programmed to the PD controller EEPROM using a COTS programmer.  However, this image does not seem to work on our board, ie. a Thunderbolt device is not recognized when plugged into the port.  I can share the schematic if that would be helpful.  

  • Hi Jose,

    Please send me your project configuration .pjt file and the schematic for your board. I will take a look.

    Additionally, what firmware base image are you using? This can be found on the General Settings page of the GUI.

    Best,

    Alex

  • We are using the firmware base image for the TPS65994AE (f09.06.12).  Attached is the .pjt file and schematicu_test.pjtTB_PD.pdf

  • Hi Jose,

    Let me take a look and get back to you later this week.

    Best,

    Alex

  • Hi Alex..  Just checking to see if you've had a chance to review the schematic and project

  • Hi Jose, sorry for the delay. I will review this today.

  • Hi Jose,

    I reviewed your schematic and project configuration. I have the following comments and queries:

    1.) I see you have GPIO2 routed as Retimer_LS_EN in the schematic. I do not see this configured in the project file but I do believe you are pulling this up to 3.3V permanently. This should be ok but please follow my queries below to verify. The project config looks ok in general.

    2.) When you say the TBT device is not recognized when plugging into the type-C port, can you specify what this means? Is there still a PD connection? Do you see the TBT Connection bit asserted in the Data Status 0x5F PD register? 

    3.) I would need to see some logs to properly debug this issue. If you have a PD analyzer. can you send a PD log of the connection? Please also capture the PD's LDO_3V3 output, VBUS, Retimer_LS_EN GPIO, and Retimer_Reset_N GPIO (analog preferred). I want to see if the GPIOs are correctly firing on connection of the TBT device to the type-C port.

    Best,

    Alex

  • The binary file did not work when I tried it on our reference design.  However, this does work on our board, which followed the same reference design.