This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65219: PMIC I2C address

Part Number: TPS65219
Other Parts Discussed in Thread: TPS65220

Hello,

I am using TPS6521902RHBR variant in my custom board.
According to datasheet this PMIC should have I2C address = 0x30 by default, but instead it answer when probed on 0x24 address. 

Using the same software on the devboard AM64-SK which mounts a TPS65220 the I2C address is correctly found to be 0x30.
Apart from the incorrect address being set, the PMIC seems to work as it should: it provides the correct voltages and I can correctly access all the registers with the new address.

Since the PMIC on our custom board has never been reprogrammed by us (we got this board assembled this week) I am puzzled by this situation.
Why is the address changed? Is it something that happens in factory when releasing the -02- variant or should this suggest a malfunction?

Thank you for your help,
Paolo Mattachini

  • Hi Paolo,

    I checked the NVM for the TPS6521902 and the I2C address should be set to 0x30. This is confirmed in the TRM here: https://www.ti.com/lit/ug/slvucl0/slvucl0.pdf 

    It is also confirmed in register dumps I have found for this NVM revision. So I am not sure how your device is showing 0x24 for the address. Have you verified this on more than one device?

    Best regards,

    Matt

  • Hi Matt,
    thank you for your quick answer.
    For now we have just this one board.

    We will continue software development, and as a workaround we will have the I2C master perform a search between 0 and 128 during the initialization phase, but I would prefer not to have this in the final product. I am a bit concerned that this unexpected address change can signify some underlying fault.

    Please let me know if you have any updates on the issue.

    Best regards,
    Paolo

  • Hi Paolo,

    It would be good if you could confirm this on one more device. I have not heard of anyone else reporting the issue you've described, so it would be important to verify if there is a real error in the NVM configuration of the device. Are you reading the value of the I2C Address register to confirm also?

    Regards,

    Matt

  • Hello Matt,

    sorry for the late reply.

    I checked the I2C_ADDRESS_REG and it is set to 0xB0 instead of 0x30.

    I also checked FACTORY_CONFIG_2 which contains 0x60. It should contain 0x3 according to TRM.

    Moreover I tried to change LDO1 to 0.9V (from active state), I can set the value and store it in NVM but the output voltage never changes, it is always set to 1.8V, which is also wrong since it should be 3.3V according to TRM.

    The only action I can reliably perform is turn off and on again the regulator.

    Unfortunately I am still not able to test this on another board, I have asked for a second one to be produced but I do not know when it will be available.

    Please let me know if you have any idea what is going on.

    Best regards,
    Paolo Mattachini

  • Hi Paolo,

    If register field "I2C_ADDRESS_REG" is reading 0xB0, that means at least one of the default register settings was changed. As shown in the capture below, this register includes the I2C address (bit# 6-0). Bit#7 indicates if a re-programming command was sent to the PMIC. If you change 0xB0 to binary, you will notice that bit# 6-0 equals 0x30 in hex.

    If LDO1 output voltage is not changing from 1.8V, that's probably because this rail is controlled with the VSEL_SD pin. When VSEL_SD pin is low, LDO1 behaves as a fixed 1.8V LDO. Could you share the schematic and the readback from all the PMIC registers?

    Thanks,

    Brenda

  • Hello, 
    please find below the schematic and register dump as requested. 

    Bit #7 in I2C_ADDRESS_REG is set as I tried to change LDO1 output and program NVM before noticing that there were no real changes.

    Today I have tried to change bit VSEL_SD_I2C_CTRL in register MFP_1_CONFIG, but as soon as I set it to 1 the PMIC shuts down all the rails (probably transitions to initialize).
    As far as I understand from the datasheet it should be possible to control LDO1 output in VSEL_DDR mode, please share some instructions on how to do this.

    5238.pmic.pdf

    Register dump:
    TI_DEV_ID 0x00
    NVM_ID 0x02
    ENABLE_CTRL 0x7F
    BUCKS_CONFIG 0x0B
    LDO4_VOUT 0xA6
    LDO3_VOUT 0x98
    LDO2_VOUT 0x05
    LDO1_VOUT 0x06
    BUCK3_VOUT 0x94
    BUCK2_VOUT 0xA4
    BUCK1_VOUT 0x86
    LDO4_SEQUENCE_SLOT 0x22
    LDO3_SEQUENCE_SLOT 0x22
    LDO2_SEQUENCE_SLOT 0x50
    LDO1_SEQUENCE_SLOT 0x22
    BUCK3_SEQUENCE_SLOT 0x30
    BUCK2_SEQUENCE_SLOT 0x22
    BUCK1_SEQUENCE_SLOT 0x42
    nRST_SEQUENCE_SLOT 0x80
    GPIO_SEQUENCE_SLOT 0x60
    GPO2_SEQUENCE_SLOT 0x02
    GPO1_SEQUENCE_SLOT 0x60
    POWER_UP_SLOT_DURATION_1 0xC9
    POWER_UP_SLOT_DURATION_2 0xCD
    POWER_UP_SLOT_DURATION_3 0xC0
    POWER_UP_SLOT_DURATION_4 0x00
    POWER_DOWN_SLOT_DURATION_1 0xCC
    POWER_DOWN_SLOT_DURATION_2 0x00
    POWER_DOWN_SLOT_DURATION_3 0x00
    POWER_DOWN_SLOT_DURATION_4 0x00
    GENERAL_CONFIG 0x02
    MFP_1_CONFIG 0x41
    MFP_2_CONFIG 0xDE
    STBY_1_CONFIG 0x7F
    STBY_2_CONFIG 0x02
    OC_DEGL_CONFIG 0x00
    INT_MASK_UV 0x00
    MASK_CONFIG 0xE0
    I2C_ADDRESS_REG 0xB0
    USER_GENERAL_NVM_STORAGE_REG 0x00
    MANUFACTURING_VER 0x02
    MFP_CTRL 0x00
    DISCHARGE_CONFIG 0x7F
    INT_SOURCE 0x00
    INT_LDO_3_4 0x00
    INT_LDO_1_2 0x00
    INT_BUCK_3 0x00
    INT_BUCK_1_2 0x00
    INT_SYSTEM 0x00
    INT_RV 0x00
    INT_TIMEOUT_RV_SD 0x00
    INT_PB 0x04
    USER_NVM_CMD_REG 0x00
    POWER_UP_STATUS_REG 0x18
    SPARE_2 0x00
    SPARE_3 0x00
    FACTORY_CONFIG_2 0x60

    Thank you for your help,
    Paolo

  • Hi Paolo,

    Please find my feedback below and let us know if you have any questions. It is recommended to request a full schematic review (PMIC + peripherals + MCU) from the Sitara processor team. 

    • The reason why LDO1 output voltage is not changing might be because you need to do the following: re-program the VSEL pin configuration from "SD" to "DDR" by changing the VSEL_DDR_SD field (address 0x1F, bit#0). Keep "VSEL_SD_I2C_CTRL" with the original setting (0x1 / LDOx_VOUT register setting).

    • Bucks output capacitance: This NVM has the Bucks configured to operate in Quasi-fixed frequency and high bandwidth. The table below from the spec shows the requirements for the local and point of load (POL) capacitance. 47uF capacitance (after de-rating) local capacitance is typically used on each Buck. Please increase the output capacitance accordingly. 

    • GPO1 is disabled by default and can only be enabled by I2C after the PMIC completes the power-up sequence (after nRSTOUT is released).

    • If the PMIC nRSTOUT pin is used to drive the processor MCU_PORz, then customer must have a buffer, a logic gate or any other circuitry that would allow to change the voltage level from 3.3V to 1.8V. The reason is because MCU_PORz uses a 1.8V domain.  

    • The VSYS pin requires a minimum of 2.2uF input capacitance close to the pin. The schematic doesn't show any. 

    • It is recommended to supply the VPP LDO (U7 / TLV755x) with the pre-reg (VCC_3V3_SYS_EXT).

    • If MODE/RESET pin is driven by RESETSTATZ, the processor recommends having a 10K Ohms pull-down resistor (to GND) instead of a pull-up to keep the signal low until the processor is released from reset.

    Thanks,

    Brenda