UCC21750: Any improved version of UCC21750 gate driver model

Hi AM,

Thanks for reaching out. Our expert is currently OoO, we'll get back to you by end of this week.

Best,

Pratik

Hi AM,

I did make a new model. Here it is, and you are welcome to try it.

UCC21750.zip

I am having some trouble getting it to work with the Wolfspeed FETs. It seems they both work on their own, but not together. I am still trying to figure out how much additional complexity can be added to a simulation with FET model and still have a PSPICE simulation result.

What are your primary needs for this model? I might need to start with a greatly simplified model design just to get something to converge.

Best regards,

Sean

Hi Sean, thank you for sharing this model! Can I use this model within LTspice as well? Were you able to successfully simulate a SiC MOSFET-based half-bridge with this model? If yes, which company's SiC MOSFET did you use? Have you tried ST's or onsemi's SiC MOSFETs?

No problem AM,

Yes, you can use it in any spice simulator. Here is the raw netlist for that purpose: 1524.UCC21750.lib

PSPICE has a "Power NMOS" which is a spice level 3 model:

.model power_Mbreakn NMOS W=1 L=1u LEVEL=3 CBD=1E-9 RDS=1E+06 TT=1n VTO=3.0
+ RD=0.1 RS=10E-3 RG=0.5 CGSO=1E-9 CGDO=100E-12

My model works with this FET model, and I can test a half bridge in a double pulse test.

If you give me a specific FET model that you are using, I can try to see if my model will work. I am having trouble putting my model into a simulation with these more complicated FET models; I am getting a convergence issue.

Best regards,

Sean