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Original question:

LM27762: I'm not sure how to use the PGOOD terminal of LM27762.

LM27762: PGOOD Pin Operation

Andrew Brownlie
Prodigy 10 points
Part Number: LM27762

Hi, 

I'm trying to understand the operation of the PGOOD pin on this device but I find the working of it confusing.

Within the Pin Functions it says that Logic 0 = Power good, Logic 1 = power not good. I assume that this means when power is good the open drain FET is switched on and would pull whatever is connected to this pin low, is this correct?

Thanks,

Andrew

  • 0
    TI__Genius 16470 points

    Hello Andrew,

    your understanding is correct. The open drain FET requires an external pull-up resistor as described in section 8.1 of the datasheet. When the power is good according to the table in section 7.3.5, then the open drain FET is activated and causes a logic low signal at the PGOOD pin.

    You can also see the operational behavior of the PGOOD signal in figure 10 and 11 in the datasheet (page 7).

    Best regards,

    Andreas.