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BQ76952: FET Control

Part Number: BQ76952

HI TI Expert!

When I used bq76952 to control the FET, I used low-side FET. When undervoltage protection occurred, the CHG FET seemed to turn off abnormally. When undervoltage protection occurred, the device actively turned off the DSG FET. Then the host uses commands to close the CHG FET, but the CHG FET is closed and then opened in the middle.

The oscilloscope shows light blue is DCHG , pink is DDSG, the process is undervoltage, and then CUV Delay 0x01, CHG FET is closed by the host using the command.

Here is my configuration.

DCHG 0xA2;

DDSG 0xA2;

CFETOFF 0x02;

DFETOFF 0x02;

FET_CHG_PUMP_CONTROL 0x00;

Want to know what causes this and how to solve the problem?
Look forward to your answer, thank you

  • Hello Zhang,

    Command should not be used to control the FETs when the DDSG/DCHG pins are being used. That may be why you saw this.

    See the following thread:

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/963339/bq76952-need-clarification-on-ddsg-and-dchg-operation

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    Thank you for your answer.

    I read the link you provided above,

    There are still some things I don't understand, such as:

    1, if I use DDSG and DCHG, I want to use the host to send commands to control the FET off and on, how will this operate?

    2, the above link says that when DFETOFF and CFETOFF are configured to 0x02, the FET should not be controlled by command. If you want to control the FET by command, you need to configure DFETOFF and CFETOFF to 0x00 and set the Alert pin to 0x02. Is the ALERT pin used as an MCU interrupt so that the FET can be controlled using command?

    Because I want to use the host to send commands to control the closing and opening of the FET when using the low-side FET.

    Look forward to your reply. Thank you

  • Hello Zhang,

    The E2E thread clearly states that it is not recommended to use the commands if using DDSG/DCHG for FET control.

    The post is mentioning that to control the low-side FETs(Controlled by DDSG/DCHG), DFETOFF/CFETOFF should be used and controlled by the MCU instead. It states to not use the commands to control the FETs.

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    Thank you for your answer.

    According to what you said and what I understand, if I use the low-side FET, I can't use the host command to control the FET, only the device itself can control it, and if I want to use the command control, I need to use the high-side FET, is that the understanding? Or low side FET if I can use commands then what should I do?
    Another problem is that the step unit of OCC and OCD is 2mV. If the current resistance I use is 0.125 mΩ, does it mean that my OCC accuracy is 2/0.125 = 16A?
    Look forward to your reply, thank you!

  • Hi Zhang,

    Luis is out of office until Wednesday (4/10) and will be able to get back to you then.

    Thank you for your patience.

    Regards,

    Max Verboncoeur

  • Hello Zhang,

    if I want to use the command control, I need to use the high-side FET, is that the understanding? Or low side FET if I can use commands then what should I do?

    Correct! If you want to use the command control, you'd need to use high-side FETs. You cannot use the commands with the DDSG/DCHG pins as low-side FETs. If you want to control the low-side FETs, you'd need to use CFETOFF or DFETOFF instead.

    Another problem is that the step unit of OCC and OCD is 2mV. If the current resistance I use is 0.125 mΩ, does it mean that my OCC accuracy is 2/0.125 = 16A?

    At what currents would you want the protections to trigger? For OCC/OCD current protections, a comparator is used, which has roughly ~2-mV of accuracy for settings <20-mV. For a 0.125-mOhm sense resistor, this would be 16-A, correct. For SCD, the accuracy specs this as a percentage of the ideal threshold.

    These are the limits for this protection, so we warranty that it will not be any worse than this, but in practice this error may be a lot less. For an idea of this, you can refer to Figure 7-15. Overcurrent in Discharge Protection 1 (OCD1) Threshold vs. Temperature and Figure 7-16. Overcurrent in Charge Protection (OCC) Threshold vs. Temperature of the datasheet.

    Now, keep in mind that these are the specs for the protections. For actual measurements, an ADC is used. This has an LSB of 7.6µV. With a 0.125-mOhm sense resistor, this would be a current resolution of 7.6µV/0.125mOhm = 60.8-mA with a 0.125-mOhm resistor. This is the smallest current that could be measured in this case.

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    Thank you for your answer. As for the threshold setting range of OCC and OCD, I understand that the accuracy of the detection resistance of 0.125-mOhm is 2/0.125 = 16A, so if I want to set the threshold of OCC to 8A or 10A, I write the configured threshold of OCC to 1. In fact, after the configuration is completed, the OCC threshold is 16A, so I will not get the OCC threshold of 8A or 10A that I want, because the OCC accuracy is 16A, can only set 16A or 32A or higher, is this understanding correct?

    Thank you!

  • Hello Zhang,

    Yes, I'd say that is correct. 

    Usually when customers use such low sense resistor value, they expect very high discharge currents. I am surprised that you require such a low resistance while having current protections that small.

    I'd recommend to increase the sense resistor value to a higher value, like 1-mOhm, if you would like to have current protections at lower current levels.

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    Thank you for your answer,

    Now our OCC threshold needs 60A and OCD threshold needs 210A, so you may need such a small current resistance,

    This is the latest oscilloscope waveform I obtained. After appearing in CUV, DDSG and DCHG are controlled by commands, and then CHG FET is constantly opened and closed. Is this also caused by using commands to control low side FET?

    Thank you!

  • Hello Zhang,

    With that threshold, that makes more sense. With a 1-mOhm sense resistor you can handle up-to 200-A of current accurately. Do you expect currents higher than this?

    You could even use a 0.5-mOhm sense resistor to handle up-to 400-A of current. That'd be more accurate than using a 0.125-mOhm sense resistor.

    This is the latest oscilloscope waveform I obtained. After appearing in CUV, DDSG and DCHG are controlled by commands, and then CHG FET is constantly opened and closed. Is this also caused by using commands to control low side FET?

    That is possible. We do not recommend to use the FET commands when controlling low-side FETs with the DDSG/DCHG pins. This is detailed in the Technical Reference Manual. This older E2E also explain in detail why DDSG/DCHG should not be used with FET commands:

    If you want to control the low-side FETs with your MCU, you should use the CFETOFF and DFETOFF pins instead.

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    I want to understand what you mean by "If you want to control the low-side FETs with your MCU, you should use the CFETOFF and DFETOFF pins instead"

    And read the link you provided carefully,Now there are a few questions.

    1,Does MCU refer to BQ? Or are they referring to other devices like the STM32?

    2,“use the CFETOFF and DFETOFF pins instead”,What this means is that if I need to use an MCU to control the low low-side FETs, then I need to use CFETOFF, with the DFETOFF pin configured 0x02 and DDSG off, and the DCHG pin configured 0x00?

    3,Do I need to use the CFETOFF and DFETOFF pins instead of DDSG and DCHG if I want to use command control of the FET? Or is it that as long as the low-test FET is used, in either case, command control cannot be used, and only the BQ device can control itself?

    Look forward to your reply, thank you!

  • Hello Zhang,

    1,Does MCU refer to BQ? Or are they referring to other devices like the STM32?

    MCU refers to the host MCU, like an STM32, not the BQ device.

    2,“use the CFETOFF and DFETOFF pins instead”,What this means is that if I need to use an MCU to control the low low-side FETs, then I need to use CFETOFF, with the DFETOFF pin configured 0x02 and DDSG off, and the DCHG pin configured 0x00?

    No. The DDSG and DCHG pins needs to be configured for FET control, so they need to be configured for DDSG and DCHG. If it is 0x00, nothing will take effect. The CFETOFF and DFETOFF pins are configured as inputs. When they are set, the FETs will turn-off.

    3,Do I need to use the CFETOFF and DFETOFF pins instead of DDSG and DCHG if I want to use command control of the FET? Or is it that as long as the low-test FET is used, in either case, command control cannot be used, and only the BQ device can control itself?

    No, CFETOFF/DFETOFF are inputs that control the DSG/CHG or DDSG/DCHG pins. So in here the DDSG/DCHG can be configured for autonomous control, or they can be turned off by the host MCU.

    Hope that cleared things Slight smile. Let me know if you have more questions.

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    You said "CFETOFF/DFETOFF are inputs that control the DSG/CHG or DDSG/DCHG pins. So in here the DDSG/DCHG can be configured for autonomous control, or they can be turned off by the host MCU."

    1,,In  low-side using FET, DEETOFF,CFETOFF and DDSG,DCHG these four pins how do I configure? They're all set to 0x02, right?

    2,Do you mean that you can only use the host to control the FET to shut down but not to control the FET to open? Is host control by command or other means? Can you tell me this way? Because I didn't understand the instructions in the data book very well.

    Thank you!

  • Hello Zhang,

    CFETOFF/DFETOFF can be configured as 0x02, as you previously suggested. DDSG/DCHG need to be configured for low-side FET control. There is an FAQ on the topic here:

    The FET's will need to be configured to remain ON, then a logic high signal to CFETOFF/DFETOFF can be used to turn the FETs OFF. To turn the FETs back ON, you simply need to have a logic low signal to CFETOFF/DFETOFF. 

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    DCHG,DDSG set 0xA2,

    DFETOFF,CFETOFF set 0x02,

    FET_CHG_PUMP_CTR set 0x00,

    FET_OPTIONS set 0x0E,

    Is this configuration correct?

    You said "you simply need to have a logic low signal to CFETOFF/DFETOFF",Does the low level signal use the CFETOFF, DFETOFF pin to generate its own high and low level or does it use the outside to give the DFETOFF,CFETOFF pin a high and low level signal?

    After the configuration is complete, the FET is not controlled by commands, but by CFETOFF,DFETOFF pins to control the opening and closing of the FET. Is that right?

    Thank you!

  • Hello Zhang,

    No, it does not generate its own signal, CFETOFF/DFETOFF are controlled by an external signal, which typically would come from the host MCU.

    What configuration do you want? Do you want to manually control the FETs? Or do you want full control of them?

    Best Regards,

    Luis Hernandez Salomon

  • HI Luis,

    Yes, I want to control it when I need to, like turning it off or on when there's no protection happening. As I understand it, I configure these pins as described above, and then when I want to turn off the FET I need to give CFETOFF,DFETOFF a high level like 3.3V to turn it off or turn it on, right?

    Thank you!

  • Hello Zhang,

    Correct, you'd need to apply a high-level signal, like 3.3-V to turn the FETs OFF. To turn the FETs ON, you'd need to simply apply a low signal, like 0-V for the turn-on.

    I believe that the CFETOFF/DFETOFF pins can also be configured to active-low or active-high, so it is also possible to configure it so that a low signal, like 0-V will turn-off the FETs, and a 3.3-V signal will turn-off the FETs.

    Best Regards,

    Luis Hernandez Salomon