Hello TI Experts,
I am trying to control Cell Balancing using Host Commands, I only set 0x0083 CB_ACTIVE_CELLS() to control cell balance and do not provide any voltage threshold.
After setting the 0x0083 CB_ACTIVE_CELLS() I can also confirm that I read back 0x0083 CB_ACTIVE_CELLS() and both the set and read data match. I am using 25.5 Ohms resistor for balancing.
For some reason I do not see the balancing being active (the reason I say this is that there is no voltage drop across the resistor and also the gate is not turning ON). Also when balaning is ON the temperature on balance resistor is expected to rise which i see constant and not rising at all.
I have pasted below config resistor values can you please check below and help me understand why the cell balancing is not turning ON?
AFE_CDD_DataMemoryMap_tst AFE_CDD_data_mem_config_map_gast[AFE_CDD_CONFIG_DATAMEM_NUM_MAX] =
{
/*
len_u8
val_s32 |
address_u16 | |
| | |
| | |*/
/*********************************************************************************************************************/
/* AFE_CDD_DATAMEM_GAIN_VCELL_01 */
{ 0x9180, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_02 */
{ 0x9182, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_03 */
{ 0x9184, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_04 */
{ 0x9186, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_05 */
{ 0x9188, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_06 */
{ 0x918A, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_07 */
{ 0x918C, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_08 */
{ 0x918E, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_09 */
{ 0x9190, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_10 */
{ 0x9192, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_11 */
{ 0x9194, 0x2F55, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_12 */
{ 0x9196, 0x2F57, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_13 */
{ 0x9198, 0x2F57, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_14 */
{ 0x919A, 0x2F57, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_15 */
{ 0x919C, 0x2F57, 2 },
/* AFE_CDD_DATAMEM_GAIN_VCELL_16 */
{ 0x919E, 0x2F5C, 2 },
/* AFE_CDD_DATAMEM_CC_GAIN_RAW 0x41723000 */
{ 0x91A8, 0x40217555, 4 },
/* AFE_CDD_DATAMEM_CAPACITY_GAIN_RAW 0x4A881C6A */
{ 0x91AC, 0x4937b426, 4 },
/* AFE_CDD_DATAMEM_CONFIG_POWER */
{ 0x9234, 0x2C80, 2 },
/* AFE_CDD_DATAMEM_CONFIG_REG12 */
{ 0x9236, 0x0D, 1 },
/* AFE_CDD_DATAMEM_CONFIG_ALERT_PIN */
{ 0x92FC, 0x26, 1 },
/* AFE_CDD_DATAMEM_CONFIG_CFETOFF_PIN */
{ 0x92FA, 0x00, 1 },
/* AFE_CDD_DATAMEM_CONFIG_DFETOFF_PIN */
{ 0x92FB, 0x00, 1 },
/* AFE_CDD_DATAMEM_CONFIG_TS2_PIN */
{ 0x92FE, 0x07, 1 },
/* AFE_CDD_DATAMEM_CONFIG_TS3_PIN */
{ 0x92FF, 0x07, 1 },
/* AFE_CDD_DATAMEM_CONFIG_HDQ_PIN */
{ 0x9300, 0x07, 1 },
/* AFE_CDD_DATAMEM_CONFIG_DCHG_PIN */
{ 0x9301, 0xAA, 1 },
/* AFE_CDD_DATAMEM_CONFIG_DDSG_PIN */
{ 0x9302, 0xAA, 1 },
/* AFE_CDD_DATAMEM_CONFIG_DACONFIG */
{ 0x9303, 0x06, 1 },
/* AFE_CDD_DATAMEM_CONFIG_VMODE */
{ 0x9304, 0xFFFF, 2 },
/* AFE_CDD_DATAMEM_AUTO_SHUTDOWN_TIME */
{ 0x9254, 0x01, 1 },
/* AFE_CDD_DATAMEM_PROT_CONFIG */
{ 0x925F, 0x0402, 2 },
/* AFE_CDD_DATAMEM_EN_PROT_A */
{ 0x9261, 0x80, 1 },
/* AFE_CDD_DATAMEM_EN_PROT_B */
{ 0x9262, 0x40, 1 },
/* AFE_CDD_DATAMEM_EN_PROT_C */
{ 0x9263, 0x42, 1 },
/* AFE_CDD_DATAMEM_FET_OPTIONS */
{ 0x9308, 0x0B, 1 },
/* AFE_CDD_DATAMEM_COW_CHK */
{ 0x9314, 0x05, 1 },
/* AFE_CDD_DEFAULT_ALARM_MASK */
{ 0x926D, 0xFEF7, 2 },
/* AFE_CDD_DATAMEM_SF_ALERT_MASK_A */
{ 0x926F, 0x80, 1 },
/* AFE_CDD_DATAMEM_SF_ALERT_MASK_B */
{ 0x9270, 0x40, 1 },
/* AFE_CDD_DATAMEM_SF_ALERT_MASK_C */
{ 0x9271, 0x40, 1 },
/* AFE_CDD_DATAMEM_PF_ALERT_MASK_A */
{ 0x92C4, 0x93, 1 },
/* AFE_CDD_DATAMEM_PF_ALERT_MASK_B */
{ 0x92C5, 0x98, 1 },
/* AFE_CDD_DATAMEM_PF_ALERT_MASK_C */
{ 0x92C6, 0x78, 1 },
/* AFE_CDD_DATAMEM_PF_ALERT_MASK_D */
{ 0x92C7, 0x01, 1 },
/* AFE_CDD_DATAMEM_ENABLE_PF_A */
{ 0x92C0, 0x93, 1 },
/* AFE_CDD_DATAMEM_ENABLE_PF_B */
{ 0x92C1, 0x88, 1 },
/* AFE_CDD_DATAMEM_ENABLE_PF_C */
{ 0x92C2, 0x78, 1 },
/* AFE_CDD_DATAMEM_ENABLE_PF_D */
{ 0x92C3, 0x01, 1 },
/* AFE_CDD_DATAMEM_MFG_STATUS_INIT */
{ 0x9343, 0x0050, 2 },
/* AFE_CDD_DATAMEM_CHG_PUMP_CTRL */
{ 0x9309, 0x00, 1 },
/* AFE_CDD_DATAMEM_CBAL_CONFIG */
{ 0x9335, 0x00, 1 },
/* AFE_CDD_DATAMEM_CBAL_MAX_CELLS */
{ 0x933A, 0x10, 1 },
/* AFE_CDD_DATAMEM_CBAL_CHG_MIN_CELLV_THRES_V */
{ 0x933B, 0x0C80, 2 },
/* AFE_CDD_DATAMEM_CBAL_CBAL_INTERVAL_SEC */
{ 0x9339, 0xFF, 1 },
/* AFE_CDD_DATAMEM_CBAL_CHG_EN_DELTA_THRES_mV */
{ 0x933D, 0x01, 1 },
/* AFE_CDD_DATAMEM_CBAL_CHG_STOP_DELTA_THRES_mV */
{ 0x933E, 0x00, 1 },
/* AFE_CDD_DATAMEM_CBAL_RLX_MIN_CELLV_THRES_V */
{ 0x933F, 0x0C80, 2 },
// /* AFE_CDD_DATAMEM_CBAL_RLX_EN_DELTA_THRES_mV */
// { 0x9341, 0x28, 1 },
// /* AFE_CDD_DATAMEM_CBAL_RLX_STOP_DELTA_THRES_mV */
// { 0x9342, 0x0F, 1 },
/* AFE_CDD_SLEEP_VOLTAGE_MEAS_INTERVAL_SEC */
{ 0x924A, 0x05, 1 },
/* AFE_CDD_SLEEP_WAKE_HYST_SEC */
{ 0x924D, 0x01, 1 },
/* AFE_CDD_DATAMEM_SCD_THRESHOLD_mV */
{ 0x9286, 0x0F, 1 },
/* AFE_CDD_DATAMEM_SCD_DEBOUNCE_uSEC */
{ 0x9287, 0x01, 1 },
/* AFE_CDD_DATAMEM_SCDL_LATCH_LIMIT_COUNT */
{ 0x9295, 0x32, 1 },
/* AFE_CDD_DATAMEM_HOST_WD_TIMEOUT_SEC */
{ 0x92B2, 0x01, 1 },
/* AFE_CDD_DATAMEM_LD_ACTIVE_TIME_SEC */
{ 0x92B4, 0x0A, 1 },
/* AFE_CDD_DATAMEM_SOV_THRES_V */
{ 0x92CE, 0x109A, 2 },
/* AFE_CDD_DATAMEM_SOT_THRES_degC */
{ 0x92DA, 0x46, 1 },
/* AFE_CDD_DATAMEM_SOTF_THRES_degC */
{ 0x92DC, 0x6E, 1 },
/* AFE_CDD_DATAMEM_VIMR_CHK_MAX_CELL_V */
{ 0x92DE, 0x0C80, 2 },
/* AFE_CDD_DATAMEM_VIMR_CHK_IMB_THRES_mV */
{ 0x92E2, 0x0D48, 2 },
/* AFE_CDD_DATAMEM_VIMR_CHK_MAX_RLX_CURR_mA */
{ 0x92E0, 0xC8, 1 },
/* AFE_CDD_DATAMEM_VIMR_EN_RLEAX_MIN_DURATION_SEC */
{ 0x92E5, 0x0258, 2 },
/* AFE_CDD_DATAMEM_VIMA_CHK_MAX_CELL_V */
{ 0x92E7, 0x0C80, 2 },
/* AFE_CDD_DATAMEM_VIMA_CHK_IMB_THRES_mV */
{ 0x92EB, 0x0D48, 2 }
};
Cell Balancing Circuit:
Vcell to BQ76952 Connection:
