hello,there have very good effect in low-voltage test, but no effect on high test,VINJ have many peak voltage,it is more than 12V
Hi Jin,
You can add pictures to this thread. Click on "insert" and then "image/video/file". You can then upload the file.
Have you tried increasing VIN to 15V? You mentioned that you have the filter board. Is it the one shown below?
If so, try increasing C6 and C7 on the filter board to 4.7nF or 10nF.
Please provide pictures of your setup and what is the switching frequency of the PFC?
Ben
hello,yes,my filter board as your picture.C6 and C7?do you said inject capital or Y capital?C6 andC7 is Y capital in datasheet as picture 1, VDD is 12V, I will try to increase to15V,my PFC is 120kHz( old module PFC is 65kHz,Vinj is 12V in all time,so i change F from 65kHz to 120kHz),this is my test module and filter board as picture 2 ,i change some parameter as quickstart calculator,picture 3 is my wave of Vinj and input current(PFC 120kHz).please help me to solve this problem,thanks
TPSF12Cx-Q1_quickstart_calculator_A9(2)-CP3500，EMI CM choke to 9TS 17TS C13 8.2 C11 1.5.xlsm
TPSF12Cx-Q1_quickstart_calculator_A9(2)-CP3500，EMI CM choke to 9TS 17TS C13 8.2 C11 1.5.xlsm
thanks,i already increase Y-cap from 2.2nf to 10nf,ferrite CM choke on the board as picture,the board GND is connected to module GND (module GND is connect with chassiss case).now, I will test module according to your bom,now,thanks
,
i
hello,I use your parameter,but Vinj=12V when my module turn off ,TPSF12C1 turn on as FIG.2(VDD=12V,module with LISN),Vinj=15V when VDD=15V as FIG.3(with LISN)，but Vinj=6V (without LISN ) when VDD=12V,why?
,
Vinj=12V when AC is connected to grid and module turn on , 1 try to increase CM choke,Y-cap on the regulator side(2.2nf to 10nf),GND of EVM is connected to ground,but Vinj is still 12V on last week,my topology is boost PFC 120kHz +DCDC,PFC as below picture,if TPSF12C1 is not used this topology???
hi Ben,Rg=7.5kohms,Vinj =12V as Fig.1 when AC source is not turn on,but it is connected to module.Vinj=6V when AC source is't connected.
I have a question,is it normal that there don't have phase and magnitude wave at 1-10kHz?
hello,you said:gain of the AEF loop is phase ? Rg change from 4.5kohm to 7.5kohm,this reduce phase and increase Magnitude.
is it must to test 1-10k choke data? my Rg=4.5kHz as fig.1,Rg=7.5kHz as fig.2
Thanks,I test cm choke parameter from 1k to 30M as below file,I change RG from 7.5k to 12k,VINJ wave as fig.2,it is still saturate when nearby AC current zero crossing,I also change VDD from 12V to 15V,there is no change about VINJ as fig.1
ok, thanks, I will change Rd2 to 100 in afternoon, I test some data now, Rg change from 12k to 15k,Rd2 change from 200 to 120 ,VDD=12V as fig.1. it is no change when VDD=15V
hello, ben, I have two question
1.About CM choke impedance test method, two winding in parallel ,1 is connect to 4,2 is connect to 3 when test cm choke impedance ,as below picture, is it correct? or only need to test 1 and 2,don't need to parallel two winding?
2.Are other engineer use this chip to solve EMI problem in pfc topology that same as my PFC topology?
Hi Jin,
See below:
We have seen many different PFC topologies. We usually recommend the customers to use nanocrystalline chokes because the phase transition of the choke is much softer than ferrite chokes. You can read more about this by clicking on the link below:
Ben
hello Ben, I use
nanocrystalline chokes ,but it still don't have any effect, Vinj =12V
hello, ben, aboutCD2,i don't have 470nF 50v cap, only have 470nf 25V and 330nf 50v ,so i use 330nf 50v cap, but it don't have effect, Vinj is saturate as below picture,I try to change VDD from 12V to 15V, result don't have change,
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