BQ40Z50-R1: Does BQ40Z50-R1 support I2C operation？

Hi Zhang,

Bq40z50 should support I2C operation, however there are aspects that will need to be accounted for in design. The document below should provide useful for this topic:

SMBus Compatibility with an I2C Device

Regards,

Anthony

Please help exactly point out which aspects else should be considered especially and how to deal with these aspects.

Hi Zhang,

Please ensure that the DC Level Specifications are able to meet the SMBus protocol, along with the timing requirements:

The bq40z50 datasheet should also have more specifications of the exact timing requirements it is expecting for communication.

Regards,

Anthony

If the I2C operation submits to the hardware spec of SMBUS，is this operation called I2C？That‘s to say，why can you say the BQ40Z50-R1 supports I2C even if the SMBUS hardware spec must be met？

Is “Bq40z50 should support I2C operation” just for write/read behavior protocol but not for hardware （DC/AC level and timing）specification？

Hi Zhang,

The hardware specification should be met, however from the read/write behavior a single byte read/write should be compatible, there are situations for multi-byte read/write where their packet structures are initially incompatible, but can be structured to be compatible. These situations are documented in the SMBus Compatibility document attached.

Regards,

Anthony