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BQ76952: Schematic design review

Part Number: BQ76952

Tool/software:

Hi experts,

We received design review request from our customer. Attached please find the details. Could you please help to take a look and provide your comment on BQ76952 portion?

Thank you very much

Best regards,

Hung

bms-control.pdf

  • Hi Hung,

    The schematic looks good. I reviewed page 2 and 3, a few comments I have:

    • We recommend a 10M from BREG to VSS to keep the pin low while it is off.
    • We recommend at the very least adding footprints for 0.1uF capacitors from the SRP and SRN pins to VSS. These capacitors help to suppress transients during SCD that could push the pins over abs max. It is not strictly necessary to add them right away, but if you see these transients during SCD testing then it is good to have the footprints already there.
    • We recommend against directly connecting the TS2 pin to a GPIO. We've found that even 1uA of leakage on the pin can cause it to pull low and potentially cause the device to get stuck in soft shutdown (explained here: link). What we recommend is to have the GPIO control the base/gate of a BJT/FET that pulls on the pin. You can see an example of the recommended circuit on our EVM.

    Regards,

    Max Verboncoeur