Other Parts Discussed in Thread: LMR38020EVM, , TPS62826, LMR38020
Tool/software:
Hi, Team!
We have two TI chips: LMR38020FDDAR and TPS62826ADMQ connected together on 2 of our designs in the following way:
So, the 5V coming from the LMR38020FDDAR is connected into the Vin of the TPS62826ADMQ, and PG of the LMR38020FDDAR is connected into the EN of the TPS62826ADMQ through a pull-up resistor.
We have observed a dip occurring on the EN line of the TPS62826ADMQ on both the designs. The capture is provided below:
After rigorous investigation of the potential cause of this, we could not find an issue with our design, so we have ordered two evaluation boards: TPS62826AEVM-126 and LMR38020EVM.
We have connected them together without changing any components populated on the boards. We have connected the Vout of the LMR38020EVM into the Vin of the TPS62826AEVM-126. We have also connected the PG line of the LMR38020EVM into the EN of the TPS62826AEVM-126. They powered up alright, however when we scoped the EN line, we observed the same behaviour : the dip of 2.2V, 14us after the rise of the line:
We have then tested just TPS62826AEVM-126 in isolation. We have powered it with 5V and pulled the EN line up to VIN with the 27.8k ( same as the LMR38020EVM PG pull-up) . And saw the dip on the ramp up of the EN line:
So, we think the dip is caused by the TPS62826ADMQ chip.
Any suggestions why this is happening?
Since we see this happening on the evaluation boards we know this is not to do with our particular design, but would like to know the reason why this is happening and how we could use the chips such that we minimise this problem.
Thank you very much for your help!
Best wishes,
Kristina.