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Tool/software:
Hello team,
LDO PG is continuously getting RESET even though Vin(5V) is stable , I have attached the waveform Snap for your reference please help us to resolve the isuue
Darshan,
Is there an output capacitor connected on this? From the datasheet there is a required minimum of 2.2uF on the output, this isn't apparent from the schematic.
The PG pin is rated for only 1 mA of current. You have the 100k pullup resistor which is pulling 33uA of current. Is it possible that whatever is on the "uC_RST_LDO_PG" pin is pulling additional current? Do the PG reset pulses match with when the "uC_RST_LDO_PG" pin is monitoring the PG pin? Does this issue go away when R1014 is removed?
Is this only seen on 1 devcie? Is this seen on whole production lot?
Could you monitor the FB pin and ensure that it is also stable?
Best,
Jaime
Hello Flores,
As you suggested we made the changes and RESET is not occurring once the R1014 is removed, and we found out the issue the Uc pin was pulling down the PG pin of LDO for every 100us.
Thank you very much for providing the quick solution , I will get back to you If I need any knowledge.