TUSB544: TUSB544 LFPS

Chen Tonny

Part Number: TUSB544

Tool/software:

Hi TI Team,

When we perform the USB3.0 LFPS testing, we failed at LFPS Vtx-DIFF-PP and LFPS TBurst testing ,do you have some suggestion about this?

Should we modify which parameter to fix this issue?

Thanks!

11 months ago

0 Shane Hauser 11 months ago

TI__Mastermind 31955 points

Hi,

It seems that your LFPS signal swing is too high for the test to pass. The TUSB544 will pass through LFPS from your USB host, but should not significantly impact the signal swing. Can you lower the LFPS swing coming from the USB host?

If you are using I2C mode on the TUSB544, I recommend checking that the LFPS_EQ register is set to '0'. This would disable any EQ gain on the LFPS signal.

Best,

Shane

0 Chen Tonny 11 months ago in reply to Shane Hauser

Prodigy 90 points

Hi Shane,

We use GPIO mode on the TUSB544,could you please help to confirm how to disable the EQ gain on the LFPS signal?

Thanks!

0 Shane Hauser 11 months ago in reply to Chen Tonny

TI__Mastermind 31955 points

Hi,

If you're in GPIO mode LFPS EQ gain should be disabled by default. You'll likely need to lower the LFPS swing coming from the USB host.

You can try using setting 'R0' on the CFG pins to eliminate DC gain from the TUSB544. This may help lower the voltage swing, however the USB host is the primary means to change LFPS voltage swing.

Best,

Shane

0 Chen Tonny 11 months ago in reply to Shane Hauser

Prodigy 90 points

Hi Shane,

Below is the LFPS test result of Host, it can pass the LFPS test, should the Host change the LFPS swing voltage to which level?900mV?

0 Chen Tonny 11 months ago in reply to Chen Tonny

Prodigy 90 points

Hi Shane,

If we set 'R0' on the CFG pins to eliminate DC gain from the TUSB544，will it affect the TX Eye diagram performance?

Thanks！

0 Shane Hauser 11 months ago in reply to Chen Tonny

TI__Mastermind 31955 points

Hi,

1. Yes 900mV would be good to try for the host LFPS swing. It seems like the host passes but the swing is close to the high limit.

2. Setting 'R0' to eliminate DC gain can lower the USB signal swing, however the Eye diagram should not be significantly impacted.

Do you have a compliance report on the USB signal passing through the TUSB544? It would be good to see what margin your signal has to determine whether a reduced swing would be an issue.

Best,

Shane

0 Chen Tonny 11 months ago in reply to Shane Hauser

Prodigy 90 points

Hi Shane,

TUSB544 compliance report attached.

TUSB544 ComplianceTest Report2.docx

0 Chen Tonny 11 months ago in reply to Chen Tonny

Prodigy 90 points

Hi Shane,

TUSB544 compliance report1:

CFG pin:"FR" for TUSB544

Set up:Host+2000mm Cable+TUSB544

TUSB544 ComplianceTest Report1.docx

TUSB544 compliance report2

CFG pin:"R1" for TUSB544(1)

CFG pin:"FR" for TUSB544(2)

Set up:Host+2400mm Cable+TUSB544(1)+1850mm Cable+TUSB544(2)

7317.TUSB544 ComplianceTest Report2.docx

Thanks!

0 Shane Hauser 11 months ago in reply to Chen Tonny

TI__Mastermind 31955 points

Hi,

It seems like you've got some margin in the compliance report, so it may be ok to reduce your DC gain. To do this, use CFG setting 'R0' on the TUSB544:

If the LFPS swing is still too high after setting CFG to 'R0', you need to turn down the LFPS swing on the USB host.

Best,

Shane

0 Chen Tonny 11 months ago in reply to Shane Hauser

Prodigy 90 points

Hi Shane,

Will CFG Setting affect the performance of DP?

Thanks!

0 Shane Hauser 11 months ago in reply to Chen Tonny

TI__Mastermind 31955 points

Yes CFG will affect both DP and USB performance. In general, its best to have the highest linearity range (1100mVpp) for both USB and DP.

DC gain will slightly impact the signal swing for both USB and DP.

Best,

Shane

Power management

Power management forum

TUSB544: TUSB544 LFPS