Part Number: HD3SS3220
Tool/software:
Hello Team,
Could you please help to review the attached schematic of 'hd3ss3220" CC controller. (hd3ss3220_schematic.pdf)
hd3ss3220_schematic.pdf
As our SoC/PMIC doesn't have CC support, we have come across the use case of an external CC controller, which is hd3ss3220.
Attached the block diagram (USB.pdf) of proposed USB implementation section.
As per our design requirement, we should be able to operate the Type-C port in both DEVICE and HOST mode.
Hence considered implementation will be the DRP option of hd3ss3220.
By default SoC configuration, USB0 port will be in Device mode, and should be able to flash the firmware via Type-C port.
As per my understanding, VBUS_DET will serve that purpose upon detection of VBUS power from an external host PC, and we can operate in "DEVICE" mode.
Now the query is, how hd3ss3220 control the switching from DEVICE to HOST mode.
Is "ID" pin of hd3ss3220 will perform that operation?
(As mentioned in datasheet, ID pin---asserted LOW when CC pin detected device attachment when port is a source)
Can I map the "ID" pin of hd3ss3220 to an SoC GPIO, to configure the SoC's USB controller to HOST mode?
(based on the ID pin's logic change upon detection of HOST device attachment at USB connector)

