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Original question:

TPS65910: Change the VMMC slew rate by the register

TPS65910: Use a power-on delay circuit to slow down the rise of VDDIO.

Conor
Guru 12000 points
Part Number: TPS65910

Tool/software:

Hi,

This is a continuation of the previous question. Please refer to the related threads before reading this post.

I took measures to slow down the rise of VDDIO using a power-on delay circuit (CR time constant circuit, etc.) so that it is within the range of the data sheet specifications.

The CR time constant circuit (circuit shown below) meets the slew rate regulations of the power supply regulations, but when the consumption current (MAX 55mA) listed on page 14 of the DP83826 datasheet flows, a large voltage drop occurs at the 51Ω part and VDDIO / VDDA3V3 cannot be maintained at 3.3V.

I would appreciate it if you could suggest any other measures.

Thanks,

Conor

  • 0
    TI__Genius 9117 points

    Hi Conor, 

    Would it be possible to use an external component in your design, like a load switch that has an adjustable rise time in order to control the slew rate of this rail?
    Something like TPS27081A or TPS22995 connected to VMMC output, to control the slew rate of the output before it goes into VDDIO/VDDA3V3?

    Best Regards, 
    Sarah