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BQ76952: How to configure DDSG and DCHG as GPIO to control the output high and low levels?

L
Prodigy 220 points
Part Number: BQ76952

Tool/software:

I configured the IO of DDSG and DCHG to 0X2A,

and then sent the subcommand 0x2817 DCHG_HI(). If the DCHG pin is configured as a GPO, this subcommand sets it to drive high-level output

and the subcommand 0x2818 DDSG_HI(). If the DDSG pin is configured as a GPO, this subcommand sets it to drive high-level output.

But when I read 0x7F FET Status, I didn't find that the pin level turned high.

Did I configure it wrong?

  • 0
    Prodigy 220 points

    In addition, can these two flags be used to observe the high and low levels of these two pins (DDSG, DCG)?

    FET Status Register Field Descriptions

    5 DDSG_PIN Indicates the status of the DDSG pin.
    0 = The DDSG pin is not asserted.
    1 = The DDSG pin is asserted.
    4 DCHG_PIN Indicates the status of the DCHG pin.
    0 = The DCHG pin is not asserted.
    1 = The DCHG pin is asserted.





  • 0 in reply to L
    TI__Genius 17835 points

    Hello L,

    I believe you have configured the DDSG pin and DCHG pin as DDSG and DCHG functionality instead of as a GPIO function. This DCHG/DDSG FAQ may assist in configuring those pins correctly.

    I think those flags reflect the status of DDSG and DCHG when they are configured for DDSG and DCHG functionality.

    Best Regards,
    Alexis

  • 0 in reply to Alexis_H
    Prodigy 220 points

    Sorry, I may have asked the wrong question. I want DDSG and DCHG to be used as normal IO outputs.
    I have configured them to 0x29 now, and they can output high level, but I wonder if I can use 0x7F FET Status to see if they are in high level state? But my actual observation result is that DDSG is 0.
    5 DDSG_PIN Indicates the status of the DDSG pin.
    0 = The DDSG pin is not asserted.
    1 = The DDSG pin is asserted.
    So my question is, when ddsg dchg is used as normal IO output, it outputs high level. Can I use fetstatus to see the ddsg status, or can I only see the real status of ddsg in ddsg mode?

  • 0 in reply to L
    TI__Genius 17835 points

    Hello L,

    L said:
    So my question is, when ddsg dchg is used as normal IO output, it outputs high level. Can I use fetstatus to see the ddsg status, or can I only see the real status of ddsg in ddsg mode?

    When DDSG and DCHG pins are used for GPO functionality, the FET Status register does not show if the pin is properly asserted or not. It should only show the status of the DDSG pin correctly when in DDSG mode (DCHG when in DCHG mode).

    Best Regards,
    Alexis

  • 0 in reply to Alexis_H
    Prodigy 220 points

    Thanks for the reply


    Then I want to ask, does DDSG always follow the DSG level signal. If the short circuit protection is triggered, can DDSG switch over immediately (for example, after the short circuit protection is triggered, DSG outputs 0, can DDSG output 0 immediately)? Is the protection time consistent? (Because it is after the short circuit protection is triggered, I use DDSG to cut off the MOS)
    I am now referring to this manual Application Note Using Low-Side FET in BQ769x2 Battery Monitor Series.

  • 0 in reply to L
    TI__Genius 17835 points

    Hello L,

    L said:
    does DDSG always follow the DSG level signal.

    The DDSG when configured as DDSG function, should follow the DSG FET driver state.

    L said:
    Is the protection time consistent?

    In regard to the timing, please refer to the section below found in the ‘Do the DCHG and DDSG Signals on the BQ769x2 follow the CHG and DSG FET driver pin states? FAQ’:



    Best Regards,
    Alexis