LM43601: Webench Design obviously does not properly work if used as an inverter for 12V to -15V conversion with 0.7A load current.

There is another problem with the webench designer:
When modifying the frequency fs to 2.2MHz, there is no check if the desired Duty cycle of the design is still in accordance with the equations mentioned on page 20 of the datasheet of the LM43601.

So, it is possible to set fs to 2.2MHz, but values for Dmin an Dmax are then evaluated to:

Dmin = TON-MIN × Fs = 125ns * 2.2MHz= 27.5%

and for

Dmax = 1 - TOFF-MIN × Fs = 1 - 200ns * 2.2MHz= 56%

This clearly is in contradiction with the initial design goal of D=60%. Consequently, D=0.6 should limit fs to some value  lower than 2MHz in order to preserve some safety margin for D.

HI Volker,

Thanks for above post, We are able to replicate the above reported issues. Please find our initial response below:

1. Regarding Ioutmax for 12vin,-15vout,0.7A load. You are correct, available load current is reduced by a factor of (1 – D). We are working on updating the model to incorporate this change.
2. Currently LM43603 or LM43602 device IBB configurations are not supported by WEBENCH. 
3. Regarding FswMax support, we understand that we have Dmax and Dmin, However, In the LM43601, frequency foldback scheme is employed to extend the maximum duty cycle when TOFF-MIN is reached. The switching frequency will decrease once longer duty cycle is needed under low VIN conditions. The switching frequency can be decreased to approximately 1/10 of the programmed frequency by RT or the synchronization clock. Please refer to 7.3.8 section of datasheet.  But we still observe some issue with frequency setting on WEBENCH, We are working on fixing this.

We will get back to you once we update the model for LM43601 tentatively  before end of this week.

Regards

Shaheen S M

problem is that our implementation consumes around 85mA of quiescent current, which is more than 1 Watt. Subtraction this single Watt of input  power, efficiency is still as low as 75% for moderate (50%) load of 200mA. We will repeat the measurements with reduced switching frequency tomorrow, and let you know about the results. Circuitry is identical to the one shown above, but sync connected to -15V.

Hi Volker,

Sure, we will request the product experts to answer if you have any additional queries related to device performance apart from WEBENCH result.

Regards

Shaheen

Sorry for the delay until now, was not able to get measurement results earlier.

Measurement while lowering the switching frequency reveals that around 60mA quiescent current vanishes as well as the extraordinary bad efficiency. (The 85mA have been reported though 25mA of these were not related to this IC.) Everything seems to be quite normal at fs=500kHz.

keeping the 9.09kOhms resistor at the RT pin, Switching frequency does not seen to be lowered due to inability of increasing the duty cycle.

This does not seem to be the expected behavior of this device.

Best regards, Volker Schindler.

Hello

Are you looking at Webench data or measured data ??

Are you using FPWM mode ??

Thanks

Hello Frank,
this is measured data. With 500kHz it works proper, but with 1MHz or higher it draws excessive amount of quiescent current. Afaik webench should deliver the same design as when asked to make a step down design from 27V to 15V with Iout*27/12 with Iout being the requested output current of  the inverter (if we ignore the different voltage levels and the where the voltage source is connected).  But this is not the case. E.g. the inductance  of the inverter circuit coil proposed by  webench is significantly higher than of the equivalent step down design.

Hello

The inductance will be larger for an IBB than for a buck.

Thanks