Tool/software:
Hello,
sometimes when requesting a read to the RESET_COUNT (0xDC) register on a UCD90160A device, we get a NACK (we do it during the software init stage).
The command reference manual SLVU352G has a footnote (1) for the command "STORE_DEFAULT_ALL" that states "There is a chance that a write to this command will receive a NACK..."
- Does this also apply for the RESET_COUNT instruction? That instruction doesn't seem to have a footnote, but there is a suspicious "(1)" text in the Transaction type, Data format and Comments with no further explanation.
- Can a read to MFR_REVISION (0x9B) trigger a flash update? We read it just before the RESET_COUNT. Maybe swapping the two instructions would get rid of the nack?
Thanks