TPS65994AE: PD Controller configuration for Display Alt Mode and USB3.0 Support

Hi,

We will get back to you next week as TI is on holiday.

Regards

HI Mihai,

Please fill out the below checklist. Once the schematic is reviewed, we can configure the device it accordingly

.TPS65994_schematic review.xlsx 

Regards

Aakash

Hi Aakash,

please find attached the filled out document.

Best regards,

Mihai Gruieti5557.TPS65994_schematic review-filled-out-DIGITALGATE.xlsx

also a small update we have got in the mean time the USB3.0 working, but DP Alt mode is still not working.

Hi Mihai,
If any changes were made in pjt file. Kindly provide an updated file.

Regards
Aakash

attached is the updated file:

TPS65994AE_DP.pjt

Hi Aakash,

I would like to know if you have any updates on this matter, thank you!

Best regards,

Mihai

Hi Mihai,
You can see the values in your register if you open raw view in the GUI.

Now Change the value of register 0x51 from 0x100001c0603 to 0x108001c0603

With this change DP mode should be working.

Regards 
Aakash 

Hi Aakash,

it woks with this change and also with old configuration, but only in the case that the cable is connected to the system before the BIOS boots up, we suspect this happens because of the fact that after boot up the system tries to reinitialize the PD controller via I2C, we will do some more measurements and I will get back to you.

Hi Aakash,

I found that from both BOOT and the operating system, the hot plug detection mechanism does not work, even if the GPIO1 pin is configured as "Pin Multiplexed to Alternate Function (HPD_TX1)"
When connecting the HDMI cable, the 3V3 voltage does not appear at the GPIO1 pin.
I was able to detect the cable connection/disconnection only after configuring the GPIO1 pin as Pin Multiplexed to GPIO with Internal Pull Up Enable and selecting the dp_mode_selection_event_port1(23) event.
Could you please explain why the hot plug detection mechanism does not work when configuring GPIO1 as "Pin Multiplexing for Alternate Function (HPD_TX1)" and if it is correct to configure GPIO1 in GPIO Mode using the dp_mode_selection_event_port1(23) event?

I have attached the updated project file.
3414.TPS65994AE_DP.pjt

Hi Andrei,
Can you share the PD logs when GPIO1 is multiplexed to Alternate function (HPD_TX1)

Regards 
Aakash

Hello!
We are preparing for the new revision of our device.
In the new revision:

• Both ports are dual role ports
• Both ports have HV path  (sink 20V and up to 3A, source 5V and up to 3A)
• Both ports have USB 2.0 functionality
• Port A has USB 3.x functionality
• Port A has DP Alt mode functionality

We did some experiments with adding same HV power path to the second port with the transistor on the wires on the current revision of the board.
But the results are contradictory to our expectation and we are not confident about ordering new board revision (You can find the updated schematic attached in .pdf)
TypeC PD controller.pdf

All tests so far were done with default configuration, it should be safe and enough for testing second port
Port B HV path is working as before, we got stable VSYS over 19V.
PB_GATE_VBUS is at the PB_VBUS level and the VBUS MOSFET is OFF,
PB_GATE_VSYS is 27V (VSYS level +7V) and the VSYS MOSFET is ON

PB_GATE_VSYS is Yellow, VSYS is Blue

With the MOSFET switches added with quite long and thin wires
Port A HV path is not working as planned, we got VSYS somewhere in the range between 15V and 18V, and floating.
PA_GATE_VBUS is at the PB_VBUS level and the VBUS MOSFET is OFF,
PA_GATE_VSYS is slightly above VSYS level and the VSYS MOSFET is partially ON

PA_GATE_VSYS is Yellow, VSYS is Blue

We have disconnected the PA_GATE_VSYS from the gate. We see that IC tries to reach 27V on this drive pin but it resets every ~8ms. Because the disable slope is very sharp we suspect something may trigger fast disconnect.

PA_GATE_VSYS is Yellow, VSYS is Blue

What should we check in this case?

Hi Andrei,
Can you fill the schematic checklist.  checkList

This will help us understand the schematic better.

Regards
Aakash 

Hello Aakash,

attached is the checklist file: 6683.Schematic Checklist Rev 0p3 (2).xlsx

Hi Andrei,

I do not see the recommended capacitance at Vsys and PP5V in the schematic.
Can you add the required capacitance and try again.

Regards
Aakash