Tool/software:
Hi team,
I have a question regarding the TPS62175.
The circuit around the TPS62175 is configured as shown in the diagram below.
A DC power supply is used as the input voltage source, and DC 12V is applied to CN1 and CN2. After passing through the diode bridge and inductor, the input voltage is applied to the TPS62175.
An electronic load is connected to the output stage, and the load current is adjusted to check the output waveform from the SW terminal.
The SW waveform is as shown in the image below, and an undershoot of -1.86V is observed at the peak for 9.2ns.
As mentioned in the previous E2E post, it is considered that the waveform is caused by the inductor and parasitic capacitance of the IC itself, so there should be no problem, correct?
