Other Parts Discussed in Thread: TPS25751
Tool/software:
Hi there, I'm having trouble loading a patch from MCU to the PD controller over I2Ct as described in section 6.2 of the reference manual.
In particular, I'm confused as to the transaction structure and I2C addressing for sending the burst transfer.
I'm setting the target address in PBMs and getting a task success return value -
[I2Ct addr, DATA reg, data len, patch sz 0, patch sz 1, patch sz 2, patch sz 3, patch target address, 0x32]
[0x41, 0x09, 0x06, 0x80, 0x33, 0x0, 0x0, 0x50, 0x32]
When I try to send the burst on I2ct as described in figure 6.2, I get a task rejected (0x03) code
[i2ct addr, i2c patch address, data0, data1...]
[0x41, 0x50, 0xff, 0xff ...]
I have also tried sending the patch address directly as the I2c address, but the address is not ACK'd
[0x50, 0xff, 0xff ...]
What's the correct burst structure and how does it interact with the patch address specified in PBMs?
Thanks,
Russ