Tool/software:
Hello,
I am using the TPS548b27 to provide 10 A at 1 V to and FPGA core.
I need to run a transient simulation to confirm performance.
I used WEBENCH to get an initial design.
The table below is from the TPS548B27 data sheet:
This table shows 3.3V on VCC pin is the minimum voltage required to operate when using the internal VCC LDO.
But in section 7.1, page 12, the data sheet says the following:
“The output voltage ranges from 0.6 V to 5.5 V. The conversion input voltage ranges from 2.7 V to 16 V, and the VCC input voltage ranges from 3.13 V to 3.6 V.”
The WEBENCH design gives this circuit:
It uses the internal LDO, which the table above says you can’t do.
We want to power the dc-dc with a 3.3V +/- 3% input rail. We’d like to know if this will work.
Also. I have reached out using the E2E and have not gotten any response yet.
Thanks in advance,
Chuck Sampson
