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TPS7A4701EVM-094: PSRR measurement problem

Part Number: TPS7A4701EVM-094

Tool/software:

Hello experts,

I am conducting PSRR measurement on this EVM using an oscilloscope. please find enclosed my setup the results.

testdata july.xlsx

I got 2 problems, which completely discredits my results above:

  1. In low frequency range, the output ripple is completely covered by the noise floor, which I think may be resulted from the probe and the oscilloscope.
  2. In high frequency range, the output ripple seems get EMI-coupled by the input ripple. Because even if I shut down the EVM, the output ripple is still there.

Questions are:

  1. If I use a network analyzer, how should I avoid the noise from the probe?
  2. How to prevent the input ripple from coupling to output?
  • Hi,

    If I use a network analyzer, how should I avoid the noise from the probe?

    Vin and Vout should be measured with high-impedance probes (either scope or network analyzer) immediately at the Vin or Vout pins to minimize the set-up inductance effects. There test set-up should not have any long wires since this will add inductance and impact the results. Use SMA/ BNC connections if possible. While selecting the values of AC and DC inputs, the following conditions should be considered:
    VAC (max) + VDC < VABS (max) of LDO
    VDC – VAC > VUVLO of LDO
    Also, the best results will be obtained if:
    VDC–VAC>Vout + Vdo + 0.5 where Vout is the output voltage of the LDO and Vdo is the
    specified drop out voltage at the operating point.

    You can also use a Bode100 system by Omicron Labs. This allows for calibration prior to the measurement so that any noise from the setup can be neglected. We use this system exclusively to make PSRR measurements in lab.

    How to prevent the input ripple from coupling to output?

    You can use a smaller AC signal, say 200 mVpp. Eliminate any loops in the measurement setup. Above the unity gain frequency of the LDO, the feedback loop has very little effect, so the output capacitor dominates along with any parasitics from VIN to VOUT. It is important to eliminate any parasitics for optimum results in this frequency range.

    Please check out these Application notes for better understanding PSRR measurements: Understanding power supply ripple rejection in linear regulatorsLDO PSRR Measurement Simplified (Rev. A)

    Regards

    Ishaan