Tool/software:
Hi,
We are currently evaluating a parallel power supply configuration using the UCC29002, and we are observing unstable current sharing after startup — the load current is not balanced properly between the modules.
According to the datasheet and application notes, we understand that UCC29002 enters a defined startup mode under the following condition:
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When V_CSO < 0.8 × V_LS
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During this mode, the ADJ pin is forced to 3 V to sink the maximum adjust current
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The LS Bus Driver is disconnected via the Disconnect Switch
We suspect that this behavior is causing the output voltage to rise too rapidly, possibly leading to overcompensation. As a result, the difference between V_CSO and V_LS may oscillate, and the current loop fails to stabilize.
In contrast, when we replaced the UCC29002 with the UCC29002-1 on the same board, the current sharing was much more stable and no such oscillations were observed.
We would appreciate your guidance on the following points:
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Have there been any prior reports or known issues regarding instability caused by repeated entry into the startup mode of UCC29002?
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Is it possible that fluctuations around the startup mode threshold (V_CSO < 0.8 × V_LS) could prevent proper initiation of current sharing control?
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Would TI recommend replacing UCC29002 with UCC29002-1 in cases where stability during startup is critical?
We appreciate your support and look forward to your advice.
Best regards,
Conor