UCC28070: Low PF value

Part Number: UCC28070

Tool/software:

Dear TI Engineer,

When we testing the UCC28070DWR power board, it is normal to output 100W when the low voltage is 110V input. However, when the load is added to 200W, the PF value is only 0.4. Can you help analyze the reason?

The schematic is as below:

2110.UCC28070 SCH.pdf

The waveform is as below:

Thanks,

Kind Regards

  • Hello Lumina, 

    The waveform posted shows a sudden change of inductor current for a few milliseconds within a 1/2-line-cycle. 

    Is this showing a change from 100W to 200W for ~3ms, then back down to 100W load?

    Or, is the waveform showing behavior during steady-state continuous 200W load?

    What are the design requirements of your PFC converter, please? 

    Regards,
    Ulrich

  • Hi Ulrich,

    The waveform showing behavior during steady-state continuous 200W load. 

    The design is based on AC90V-264V input, with a maximum output of 700W. The current situation is that when the low voltage is 110V, the PF is normal, but when the load reaches 200W, the current suddenly increases and the PF value is only about 0.4. If the load is increased further, MOSFET breakdown may occur.

    We tried increasing the inductance but did not see any improvement, which can rule out the problem of inductance saturation. In addition, when the input is AC220V, there may also be a decrease in PF value when the load is above 400W.

    Thanks,

    Kind Regards

  • Hello Lumina, 

    Thank you for the additional information. 
    In that case, I think the cause of the problem might be insufficient reset of one or both of the current-sense transformers (CT) L4 and L2.

    Please provide the turns-ratio of these CTs.
    I recommend, as a test, to replace the R-C reset networks (C19, R33, C7, R21) with diode-zener reset networks as shown here:

    The value of the reset zener (Zrst) can be calculated using the UCC28070 Excel Calculator tool ( https://www.ti.com/tool/download/SLUC114 ), but a quick guess would be Vz = 47V, which is likely to be sufficient.

    In my professional opinion, the Z-D reset method is the most reliable, least stressful, and easiest to understand in terms of V-sec balance. 

    Please try this test to see if the issue goes away.

    Regards,
    Ulrich