TPS65987DDK: Alt Mode Entry

Part Number: TPS65987DDK


Hi

I've been attempting to use the TI application customization GUI tool to enter DP alt mode.  I understand this part is now NRND however it is being used in an existing design which is being modified to support alt modes.

I'm able to enter a PD power contract successfully and can see that alt mode details are available, however if I manually go to the configuration registers whilst in debug mode and change the DFPD receptacle pin assignment in register (0x51) and write that data, this doesn't seem to change the values I read back from the DP SID Status (0x58) in debug registers after reading.

I'm running in APP mode and connected over I2C.  The device I'm connecting to supports DP Alt mode.  I've taken a couple of screen shots and attached the related project. 

I'd welcome your suggestions on items to adjust in the design to successfully enter alt mode.

A further question, when using GPIO3 for HPD signalling is an external pullup resistor required or is this integral to the IO?

Regards

Malcolm

TI_TPS65987DDK_FPGA_8_DP_DFP_ONLY_HPD.pjt 

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  • Hello,

    When you change the parameters are you resending to the far end?  The status would be based upon what is negotiated.  

    Regards,

    Chris

  • Hi Chris

    I write the parameters, i.e. adjust 0x51 DisplayPort capabilities, write these values and then undertake a HRST.  Is this sufficient to update the configuration or is another change required?

    I'm using GUI tool version 6.1.4 which lists FW version F907.14.14, is this the most recent version to use?

    Regards

    Malcolm

  • Hello,

    A hard reset will put the device back into boot mode and reload the configuration, overwriting whatever you wrote.

    You need to send the 4CC command, AMDs - PD Start Alternative Mode Discovery.

     As a part of the Alternate Mode Discovery process, the Discovered SVIDS register (0x21), RX Identity SOP
    register (0x48), RX Identity SOP' register (0x49), User VID Status register (0x57), DP SID Status register
    (0x58), and Intel VID Status register (0x59) could be updated. Which registers get up dated will depend on
    how many of the Alternate Mode Discovery process PD message successfully get responses, which also
    influences whether or not the command returns it completed successfully or not in the Output DataX register.


    Regards,

    Chris

  • As a part of the Alternate Mode Discovery process, the Discovered SVIDS register (0x21), RX Identity SOP
    register (0x48), RX Identity SOP' register (0x49), User VID Status register (0x57), DP SID Status register
    (0x58), and Intel VID Status register (0x59) could be updated. Which registers get up dated will depend on
    how many of the Alternate Mode Discovery process PD message successfully get responses, which also
    influences whether or not the command returns it completed successfully or not in the Output DataX register.

    Hi Chris

    Are you able to elaborate on accessing these registers from the GUI tool?  Or can you point to a resource on enabling alt mode with the GUI tool or does this need to happen via FW?

    Regards

    Malcolm

  • Hello,

    This device is not recommended for new designs and all of the collateral has been removed from the device product page.  I image if you search the web you can find the technical reference manual.

    Regards,

    Chris

  • Hi Chris

    I understand the device is NRND, however is the support for the device also removed?

    I have the technical reference manual, however there is no linkage between this and the GUI tool.

    Regards

    Malcolm

  • Hello,

    I understand the device is NRND, however is the support for the device also removed?

    Support is significantly reduced.  The page and product number are still available for reordering parts for an existing design.  Additionally, ff you have a production issue, then you can still request FA (failure analysis).

    Regards,

    Chris

  • Hi Chris

    OK, thanks for the clarification.  

    We have made some progress and have been able to capture the following trace:

    We don't however see GPIO3 (HPD) go high, when this is set as a alt mode event, are we missing something here.

    Regards

    Malcolm

  • Hi Chris

    We have the data status HPD events bit set.

    The GPIO3 is set as:

    Does GPIO3 require an external pullup resistor or is this using a device internal pullup?

    Regards

    Malcolm

  • Hello,

    Please clear the Data Status HPD Events.  This means that you expect the GPIO to indicate HPD instead of the host reading the HPD status via I2C.

    Does GPIO3 require an external pullup resistor or is this using a device internal pullup?

    If you configure the GPIO as open drain then yes an external pullup is required.  If not set then GPIO is push-pull.

    Regards,

    Chris

  • Hi Chris

    Thank you for the feedback it has been very helpful and we have HPD being asserted now.

    I did have a question on the alt mode auto entry, I have the "DisplayPort Mode Auto Entry Allowed" option deselected however it seems that a PD negotiation to alt mode occurs.  What option should be set so that alt mode isn't auto entry?

    Regards

    Malcolm

  • Hello,

    What option should be set so that alt mode isn't auto entry?

    I am not sure what exactly you want.  Do you want the PD to report that display port is not supported until the embedded controller changes this during runtime?  

    Enable Display Port SVID

    Regards,

    Chris