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Hello,
I want to monitor a clock presence and thought about using a supervisory IC with a watchdog input, like the LM3710.
I've some questions about this one:
- Is there a minimum WDI period/low time/high time requirement for the WDI transition detection?
- After watchdog has engaged reset, how can this signal be deasserted? From the figure 1, I think that it is after tRP laps following one of this event : VCC higher than VRST+VRSTH, MR higher than VMRT+VMRTH or WDI transitions? (Hence, using this IC with a uP, the only way to restart is to cycle power or push an MR button?)
Hi Thibault,
1) I do not see a spec of the minimum pulse width you can pulse the WDI pin in the LM3710 datasheet. I recommend using the TPS3110 or TPS3823. This is speced as tw in the datasheet.
2) After the time-out period of the WDI signal, the RESET signal goes low for a period speced as td (time delay) and deasserts on its own. This can be seen in the timing diagrams also on the datasheet.
Regards,
Darwin