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LM25118MH Stability and High Output Ripple

Other Parts Discussed in Thread: LM25118
  1. The Problem
  • High output ripple voltage -  300mV in worst case
  • Unstable switching
  1. The Design
  • Input: 8-32V
  • Output: 13.6V, 100mA - 1A
  • Use WEBENCH recommended inductor value, and the output capacitor ESR is lower than required by the WEBENCH.
  • 6-layer PCB with Ground plane
  1. The Questions
  • Is the circuit stable?
  • Why the output ripple is so high?

Please see attached the schematic and waveforms.7558.LM25118MH Stability and Output Ripple Issue.pdf

  • Hi

    Please make it sure CS and CSG pins are kelvin connected to Rsense with short paths.

    Please try again without C91. Since your ESR of the output capacitor is lower than WEBENCH, removing C91 might be helpful.

    Regards,

  • Hi Eric,

    Thank you for the reply.

    The CS and CSG are kelvin connection.

    Tried to remove C91, the waveform at SW looks a bit cleaner, but the jittering and pulse skipping are still there. No improvement to the ripple. I also noticed that the on time doesn't change when the input voltage increases while the load remain the same. The output voltage is regulated though. The 2.56us/400ns on/off time are not matched with the calculation(1.6us/1.7us). Can you tell from the waveform why the every 4th off time is much longer? The following waveform is without C91.

    Thanks

    Kenny

  • Hi together, I have the same problem with LM25118. Application with an input 10 ... 32V; Output 12,0V max. abt. 6,0 A.

    To change the the value of Ccomp in smal steps do not help realy. There are newer informations?

  • Hi

    Your circuit is unstable. The reason of high output ripple is caused by this unstable operation.

    The reason of unstability can be noise injection or loop stability issue.Have you check gain/phase margin ?

    Please try C90 470nF, R83 1k Ohm, C91 330pF and let me know the result

    Regards,

  • Tried the new set of the compensation, the switching waveform looks same - every 4th off time is longer causing high ripple.

    What do you mean to check the gain/phase margin? Calculate using WEBENCH or measure using network analyzer(I don't have one)?

    Regards,

  • Hi

    Can you share your layout  and schematic ? I would like to see.

    Regards,

     

  • Can I have your private email address?

  • Thanks for information. With the new setup of the compensation my circuit is more stable. Only in a small range of input voltage (abt18 to 22V input) we have some switching frequency jitter.
    I hope with a redesign of the layout (6 layers with 70µ Cu) we will improve that. Is there a point we have especially to attend?

    Best Regards
    Bodo

  • The unstable problem is solved by decreasing the Cramp from 470pF to 270pF.The output ripple is reduced to 200mV when Vin is 8V. I think that it can be further reduced by adjusting the LC.

    Thank you for the help.