LM3488 soft start

Hello Jurjen,

I think you are correct in how this is implemented internally.

If you are looking to implement a longer soft-start delay there are several approaches that we could recommend, but the best choice would depend on your exact electrical application.

If you need some recommendation, send us your Vin range Vout and Iout range and desired topology and we can work something up.

Alan Martin

Hello Alan,

Thanks for your reply.

The ranges for my application are

Input: 9V - 30V

Output: 24V, 2A

I've already chosen for a SEPIC converter and designed one using the WEBENCH.

Attached is the WEBENCH report 7230.WebenchReport.pdf and my own design.

The signal ENABLE in my own design is connected to the collector of a NPN transistor, it's on a different schematic sheet...

Due to limitations in width and height I have used Panasonic's EEEFK1A331P as output capacitors.

According to the graphs in WEBENCH the Csep IRMS is completely different to Cout IRMS. According to the equations in AN-1484 they have to be the same!!

Convinced by reading other application notes I decided to use the calculations based in AN-1484. I calculated a RMS current of 3.31A, which is 2 times Cout IRMS and 3 times Csep IRMS !!

Because their allowable ripple current of A EEEFK1A331P is 850mA @ 100kHz, I needed 4. I chose 5 to have one spare to play with...

Regarding the compensation design: i have no clue what to believe. Application note AN-1484 contains an error (http://e2e.ti.com/support/power_management/non-isolated_dcdc/f/196/p/239196/837433.aspx#837433) and also the calculation of the resonant frequency is incomplete (http://e2e.ti.com/support/power_management/non-isolated_dcdc/f/196/p/239196/855468.aspx#855468).

I also search on this forum for SEPIC designs and their suggested compensation design, but was not able to recalculate the suggested values using AN-1484.

I therefore decided to use (i.e. to approach) the values given in the WEBENCH, but i have no idea what i'm doing except relying on the output of WEBENCH.

I started this topic because I had some questions regarding the inrush current, but I think first my design needs to be reviewed.

Could you please review the schematic and decisions I've made?

Could you also please confirm which equations in the AN-1484 are correct or give the correct equations for a SEPIC design and it's compensation design?

Regards,

Jurjen

Hello Jurjen,

The schematic in your previous post was blurred. Please re-post the schematic so that I can review and respond to you.

Regarding AN-1484 and compensation, I will forward your question to the Webench team.

Regards,

Hello Jimmy,

thanks for helping me.

I posted the schematic in PDF format. I hope that works...

0410.Converter.pdf

Hi Jurjen,

The PDF works well, I'll review the schematic and respond to you later today.

Best regards,

Jimmy 

Hi Jurjen,

I've reviewed the schematic, the output capacitor EEEFK1A331P is rated 10V only that does not comply with the 24V output requirement. I'd suggest changing the output caps to EEEFK1E331P which is a 25V part. Everything else looks good to me.

Regarding the discrepancy between Webench and AN1484 on calculated result of Co and Cep rms current, I forward your question to the Webench team.

Go ahead to cut a board to validate your design.

Best regards,

Jimmy

Hi Jurjen,

I wonder if the inrush current you observed is the result of output capacitors being charged up by the input supply voltage when it is applied to the converter. If that is the root cause, then adding a NTC thermistor in series to the blocking diode, Dprot, to limit the current at the input rail would be the simplest solution. It will be helpful if you could share scope waveform showing by the time input voltage is applied to BAT+, the inrush current flowing through Dprot, voltage at the Drain of Q1 and the output voltage.

I’ve passed your request for equations for loop compensation of SEPIC converter to the Webench team.

Regards,

Jimmy

Hi Jurjen,

For a more in depth look at SEPIC compensation for uncoupled inductors I would take a look at appnote AN-1990.

http://www.ti.com/lit/an/snva405a/snva405a.pdf

Best regards,

Tommy

Hi Tommy,

thanks for your answer.

I've read this appnote. I globally understand it, but not in the very detail.

I therefore decided to enter all equations in a Math program (Maxima) to reproduce the bode graphs of the AppNote. Next step, I should be able to fill in my own design values in order to get the bode graphs corresponding to my design.
However, using the values given in the AppNote I was not able to reproduce the graphs given in Figure 4 and 5. I discovered an error in the Appnote, equation 26 (D_c0 should not be multiplied by s, but it should be as in Eq. 7) but after correcting this I still could not reproduce Figure 4 and 5.

Hi Jurjen,

Thank you for sharing insight of your application.

No, I didn’t mean placing the NTC in series with D1; I meant place the NTC in series with Dprot (the blocking diode at the input rail in your schematic). If the “inrush current” you referring to is the pulse current drawn from the load every time the motor being started to turn from stand still, the NTC solution may not work. I would like to see the waveform to better understanding the nature of the inrush current.

The comp pin of the LM3488 is not current limited. The comp pin is noise sensitive, stability would definitely be a concern when attempting to attach additional circuitry to this pin.

I have no experience on the device shown in the article you pointed to, I am not able to comment on the solution provided by the author of the article.

Regards,

Jimmy

Hi Jurjen,

Thanks for pointing out the error. Watch out as there is also a typo with the superscripts for the s's in the last three parts of equation 7 that make them subscripts.

When I put the equations into a Math Program I get fairly close graphs to the ones in the appnote. (Though the Q of the resonant peak seems exagerated since no DCR of the inductors or ESR of the SEPIC cap was taken into account)

Hi Tommy,

I think I got the same results you have. At least, the shapes are equal :-)

In my calculations, the frequency at which the phase is -90 is 2.7 kHz and the corresponding magnitude is 23.1 dB.

This contradicts with the numbers given in the lower section of page 5 of the AppNote. This is where I started doubting..

Could you please check what the frequency and phase you get with your calculations?

Hi Jurjen,

I'm getting the same numbers you are. I will see if I can track down why they don't match the numbers in the appnote.

-Tommy

I am glad you get the same answers. Thanks for efforts.

I am curious to hear what the cause of this discrepancy is...

Hi Jimmy,

I made some scope waveforms by the time ENABLE was activated (so, the BATT+ is already present). I applied a resistive load of about 0.5A to the output.

I don't have the best scope (a USB scope) and I neither have a current probe.

In order to measure the inrush current flowing through Dprot, I inserted a 0.1E resistor in front of Dprot and measured the voltage across it. I therefore performed a floating measurement: I connected the ground of the probe to BAT+ and measured the voltage drop across the 0.1E resistor. With the second probe I measured the LM3488 driver signal (for triggering). So, the current I measure is shown negative and the gate signal is kind of inverted (it is measured with respect to BAT+).

Other measurement are measured just with respect to GND.

I performed the measurements for 24V and 13V. See attached pdf: 3858.Waveforms.pdf

Hi Jurjen,

Thank you for sharing the waveform. I am tied up by an emergency issue today and tomorrow. I will review the waveform respond to on Friday.

Best regards,

Jimmy

Jimmy On-Wing Poon said:

The comp pin of the LM3488 is not current limited.

The datasheet says that the limit value for the Error Amplifier Output Current (Source/ Sink) is about 140 uA.

I don't understand if this means that the current is limited by the device to 140 uA or that I should take care not to exceed the 140 uA.

Therefore I posed the question: is the comp pin limited?

I played around with the LM3488 in my application by removing Lin, shorting pin #3 FB to ground and making ENABLE low.

I connected several resistors between COMP and GND and noticed that the current is nearly constant.

Even when I short COMP to GND with a current measurement device the current is still 0.15mA.

The device still works...

Could you please re-evaluate my question if the output of the error amplifier is current limited (is it a current source?) or could you explain the behaviour I wrote down?

Hi Jurjen,

No dedicated current limit circuit had been implemented for the Comp pin. The Comp pin is spec’d to provide about 140uA sink / source current to charge or discharge the passive compensation network up or down, but it is not designed to being actively shorted to GND.

Shorting the Comp pin to GND may compromise reliability of the part and my recommendation is please don’t do that.

Regards,

Jimmy

Hi Jimmy,

thank you for the clarification. I will leave the COMP pin alone :)

My original problem is still there: the inrush current (which is most probably caused by charging up the output capacitors).

The circuitery I suggested in my post of Jun 14 2013 06:16 AM might cause instability and could short the COMP pin briefly, so a no go.

A NTC in the input rail is neither a good solution in my case.

What other options are available to limit the inrush current? Could you please advise?

Hi Jurjen,

I do not have a validated solution immediately available on hand. I'll ask my coleague to see if they have any idea.

Regards,

Jimmy

HI Jimmy,

Thanks for your efforts!

Searching on google for "extending soft start" yield 2 AppNotes of TI written by (your colleague?) Chris Glaser: SLVA553 and SLVA307A.

I will try that solution.

For those interested in the solutions:

I tried both solutions, the one of pulling the COMP pin (which was discouraged by Jimmy) and the one suggested in SLVA307A.

6457.Waveforms2.pdf

The soft start delays are different for the COMP pin circuitery and the FB circuitery (SLVA307A) but still there are some interesting details.

For both circuiteries, the inrush current is very well reduced and both have about the same shape for the mean current.

Although the circuitery which pulled the COMP pin down generates a nice ramping output, the input current is much noiser.

So, I'll stick with the circuitery suggested in SLVA307A.

Thanks Chris Glaser for indirectly helping me!

Hi Tommy,

did you find anything regarding the numbers in the AppNote?

Jurjen