BQ77910, FET oscillates

If it is cycling the FETs it is likely experiencing a fault or a reset.  You might try connecting to the programming interface and asking its fault status, status registers are not part of normal operation and are not in the datasheet, they are described at http://e2e.ti.com/support/power_management/battery_management/w/design_notes/1409.aspx. If there is a fault, determine its cause. It may be there is no fault and the part is resetting.  You may get a clue from the startup timing of the datasheet.

Inspect your ground connections.  GND is all connected eventually to battery-, but check routing to be sure there is no noise path.  You would like low current grounds referenced to the IC VSS pins to be on a quiet plane area with a single connection off to the noisier battery-.  See  http://e2e.ti.com/support/power_management/battery_management/w/design_notes/1452.aspx .  Although you do not describe a high current event as causing the problem, charger noise coupled into VREG ground may be able to cause a reset.

Look at the noise from the charger.  A high slew rate on the BAT pin can cause a reset of the part. See www.ti.com/lit/slua612 .  A small load on the charger may attenuate the noise. Your design does not have the holdup circuit from the datasheet or filter resistor which typically supplements the diode for improved noise filtering.  See R4 on the EVM schematic in www.ti.com/lit/sluu855 page30, but don't populate the current measurement shunt resistor as noted in slua612.

Your design does not have transient protection typical of systems which use this part.  You may not need it in your system, but the bottom side of C14 should likely connect to GND as shown in the EVM rather than to VC11.  Connecting this cap to GND avoids the possibility of VC11 being forced below VSS of the IC.  Pins forced below VSS (exceeding abs max) can cause reset.  This should not be the case with your charger connection though.

Your design has CHGST connected high at all times (R33, R34 divider).  CHGST has several functions as described in the datasheet, but basically signals the part that the pack is inserted in a charger. The part has best functionality when CHGST is manipulated in that manner but may still be useful with the reduced features when held high.  One thing CHGST does is to wake up the part, and when held high forces it on.  This is why it does not shut off VREG in observation 2.

Regarding observation 3, when the pack goes into UV, with CHGST high it is held in the ON state, so it does not shut down, but remains on with the CHG output on.  Further, if your load remains on the pack in the UV state, the R46 "RLDRM_DET" resistor is a continuous drain on the cells.  If your pack does not need to try to automatically recover after fault but can be placed on a charger with nominal pack voltage to recover from the faults, R46 is not needed.

With series FETs, CPCKN can float in shutdown which can lead to increased supply current as shown in the datasheet.  To avoid this you need a different FET topology or a separate charge FET driver so that CPCKN can be held at device VSS. 

One circuit which allows some CHGST maniuplation is Q19, Q20, Q21 and related parts on page 7 of www.ti.com/lit/slua637   This allows shutdown from shorted TS, but not from UV since it enters UV mode "in the charger" with CHG high.

An observation on the schematic, U3 or similar parts are often used as flyback or free-wheeling diodes between P- and P+, you might confirm it is in your intended location.

Thank you so very much for the detailed answer

TI is there again when you need it!

a few issues:

1) when the oscillation occures there is no status flag up, maybe because the chip wakes up before the poling of the software because of high CHGST.

2) please confirm: the 200 Ohm resistor (R4 in EVM schematic) and diode N4148 is between B+ and VBAT.

3) about transient protection, I have D7 TVS to supress transient signals as well as the capcitors C27,C31, C35, C34. do you have further suggestions?

4) about the mistake of C14, do you think it is a critical error in this case? should I change it right now on the board? may add more noise... or should I mend it in the new schematic.

5) U3 is of course effective on P- rather on B-.

6) I have to keep the FETs in serious, because of the client and room issue (extra transistor and pad) as well as connector handling. if I could "live" with the extra current on shutdown mode and self recovery from UV do you see a need of FET topology change or seperating the FETs?

thanks again,
we are in a critical stage and everything helps!

1. OK, if the part is resetting the status is likely OK or it NACKs the transaction. If the FETs are off ~100ms it is likely a reset (figure 4 of the datasheet).

2. Yes, the filter resistor (EVM R4) and diode go between B+ and the IC BAT pin (pin 31).  A large (10 uF) filter/hold-up cap should be at the BAT pin, you may still want a small (0.1 uF) cap (C12) close to the pin also.  The diode does not have much filter resistance, so the series resistor provides noise rejection.  40-200 ohm may work fine. The larger value is preferred if you have a clamp for charger transient suppression like the EVM D8.

3. It really depends on your system. D7 is good, the caps are really for ESD type events. One of the biggest transients in the system may be the LdI/dt response of the cells to short circuit protection or if your load can switch quickly.  The EVM user guide has an explanation of some of the typical protection components.If transients get past D7, consider clamps such as in the EVM.

4. C14 - again will depend on your system.  It may work fine as is, the potential issue is with sudden loads which want to push VC11 below ground and exceed its abs max.   That could cause a reset or damage to the IC. If your system does not have sudden loads it may not be a concern.

5. OK

6. The part was meant to work with series FETs, so you should not need to change the topology.  Do be aware of the items in the series FET application note mentioned above.  If you have an energetic system you may need additional protection components for the IC.  The design work and considerations for a 1A system are different than a 100A system

thanks,

adding R4 200 Ohm and D2 solved the oscillation!

we are going to a very quick re layout.

1) OK

2)C12 is a 1210 cap in my design.

3)what is the "job" of D1 without a current measurment probe? isn't the same as D8?

3)from reading the document I understand the problem in current protection transient currents. since this is a quick relayout, we cannot wait for the additional TVS diodes. is there any logic in connecting C26 to R40 in that case, like the document suggest?

I attached the mended Layout.
please give your thoughts.

TVS diods and schottky will be added in the next relayout.

thank you again, it is very important for us!