TPS3828-33 Output fail

PAN-M

Other Parts Discussed in Thread: TPS3828

Dear all.

Our customer have a problem of output of TPS3828.
A reset is output once a day by the following conditions;
VDD and /MR is stable.
WDI is open.

Is this influence by noise from WDI?
If so, do you have any good ideas?

Regards,
PAN-M

over 9 years ago

0 Ryan Eslinger over 9 years ago

TI__Guru 55940 points

Hi Pan-m,

In order to help debug, could you please provide a scope shot with VDD, /RESET, /MR, and WDI? Also, are there any additional components or devices on the /RESET rail that could be influencing the /RESET signal?

Very Respectfully,
Ryan

0 PAN-M over 9 years ago in reply to Ryan Eslinger

Mastermind 8375 points

Ryan

I have only 3 waveform from customer.
The /RESET output is connected to CPU only.

Regards,
PAN-M

TPS3828_Reset_issue.pptx

0 Ryan Eslinger over 9 years ago in reply to PAN-M

TI__Guru 55940 points

Hi Pan-m,

I apologize for not being clear. In order to help debug I need to see a single scope shot with all four channels (VDD, /RESET, /MR, and WDI). /RESET transitioning low can occur due to a change on any of the three signals. If they set the trigger for when /RESET transitions from logic high to logic low while monitoring the other three conditions, we can determine what signal is causing the transition.

Very Respectfully,
Ryan

0 PAN-M over 9 years ago in reply to Ryan Eslinger

Mastermind 8375 points

OK, I request a waveform from our customer.
The phenomenon is once a day, so I think it takes time.
Regards,
PAN-M

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TPS3828-33 Output fail