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TPS65145RGF(TPS65145) - DLP4500 reference circuit

Other Parts Discussed in Thread: TPS65145

Hi all

Would you mind if we ask TPS65145RGF?

At the first please refer to the attachment file(TPS65145PWP_Reference.pdf).
20160705_TPS65145PWP_Reference.pdf

Secondary, please refer to the following attachment file(TPS65145RGF).
(This is our customer's circuit.)
20160705_TPS65145RGF.pdf

Some of these cuircuit(4/80 %), it can't output correctly.

<Output>
+8.5V ⇒ NG +4.6V
-10.5V ⇒ NG -9.4V or 0V
+16.5V ⇒ NG 0V

We think it seems that the circuit and the constant of R, C and L are correct.
So, if you have some advice, could  you let us know?
(Of course, if this circuit has no problem, it is no matter.)

And then, ENR is not connected to GND, is it?
L1(22uH) is too large?

We really need your help.

Kind regards,

Hirotaka Matsumoto

  • Hello Hirotaka,

    ENR is connected to GND because the linear regulator is not used here. The inductor value is adjusted depending to the application, a value between 3.3 uH and 6.8 uH generally provides good performance.
    Do you have scope plots of the switch node and the SUP pin when the outputs are not correct?
    Note that you could use the positive charge pump in doubler mode since its output value is less than 2 x 8.5 V. For that leave C2+ pin open and connect the C2– pin to ground.

    Regards,
    Diaara
  • Diaara san

    Thank you for your prompt reply!

    Do you have scope plots of the switch node and the SUP pin when the outputs are not correct?
    ->We asked our customer to take scope plots of the switch node and the SUP pin when the outputs are not correct.

    We would like to confirm one point.
    When output value is less than 2 x 8.5 V, should it leave C2+ pin open and connect the C2– pin to ground?

    Kind regards,

    Hirotaka Matsumoto

  • Hello Hirotaka,

    Hirotaka Matsumoto said:
    We would like to confirm one point.
    When output value is less than 2 x 8.5 V, should it leave C2+ pin open and connect the C2– pin to ground?


    When you leave C2+ pin open and connect the C2– pin to ground, the charge pump is working in doubler mode. This way it is regulating between 8.5 V and 17 V. So when the output is less than 17 V, the doubler mode should provide better regulation.

    Best regards,
    Diaara

  • Hi Diaara san,

    Thank you very much for your cooperation always!
    OK, we got that the doubler mode should provide better regulation.

    We got the some wave forms from our customer using L=20uH and L=3.3uH.
    Please refer to the following;
    20160706_TPS65145RGF_L=3.3uH.pdf

    Regardless of the value of inductance, the problem is stopping switching operation.
    So, if you have some advice, could you let us know?
    What is the condition which switching operation stops? only OCP condtion?

    And then, we measured switching current as following attachment file.
    20160707_TPS65145RGF_Switching current.pdf

    Could you give us some advice?
    We appreciate your help always.

    Kind regards,

    Hirotaka Matsumoto

  • Hello Hirotaka,

    Thank you for the scope plots.

    After checking them, I have a couple of questions/requests for you:

    1 - Is the panel connected during these measurements?

    2 - What is the yellow signal on waveform "Wave3-2"? And what does mean the annotation on that waveform "Vin->Sup" ?

    3 - When the diode D1 is disconnected, what do they observe?

    4 - Can they change the diode D1 on one of the failing boards and measure the outputs again?

    Hirotaka Matsumoto said:
    What is the condition which switching operation stops? only OCP condtion?

    There are different conditions that bring the device into shutdown, please refer to page 11 of datasheet of TPS65145 for detailed description.

    Regards,

    Diaara

  • Diaara san

    Thank you very much for your reply!

    1 - Is the panel connected during these measurements?
    ->Yes, no connection with output.(8.5V, -10.5V, and +16.5V are no load.)

    2 - What is the yellow signal on waveform "Wave3-2"? And what does mean the annotation on that waveform "Vin->Sup" ?
    ->Our customer changed measure point from Vin to SUP to confirm SUP.

    3 - When the diode D1 is disconnected, what do they observe?
    ->We asked our customer to observe.

    4 - Can they change the diode D1 on one of the failing boards and measure the outputs again?
    ->We asked our customer to change the diode D1 on one of the failing boards and measure the outputs again.

    Above 3 and 4, we will update you as soon as possible.

    Kind regards,

    Hirotaka Matsumoto

  • Diaara san

    If you have some advice, could you let us know?

    1. NG pattern output are follows;
    +8.5V ⇒ NG +4.6V
    -10.5V ⇒ NG -9.4V or 0V
    +16.5V ⇒ NG 0V
    So, even though SUP=4.6V, we guess that Vo2 and Vo3 get a little more voltage.
    If Vo1 is not enough voltage, can Vo2 and Vo3 output? 

    2. On the file "20160705_TPS65145PWP_Reference.pdf", inductance L is used 20uH. why is this value 20uH used for? to reduce ripple current?


    Kind regards,

    Hirotaka Matsumoto 

  • Hello Hirotaka,

    1- I do not expect any of the outputs apart from the linear regulator output to be ok. It seems that the device has entered the shutdown mode (SUP is almost equal to VIN), so all functions are disabled. Therefore, I am trying to determine now which of the fault condition(s) is (are) present.

    This brings me to my previous question:

    Hirotaka Matsumoto said:
    1 - Is the panel connected during these measurements?
    ->Yes, no connection with output.(8.5V, -10.5V, and +16.5V are no load.) 

    Do I understand correctly that the faulty boards have good outputs when you remove the panel? or you meant something else?

    Hirotaka Matsumoto said:
    2. On the file "20160705_TPS65145PWP_Reference.pdf", inductance L is used 20uH. why is this value 20uH used for? to reduce ripple current?

    A bigger inductance may be used for different reasons such as reduce the ripple like you mention; get better efficiency. Some values of inductance are recommended in the datasheet and customers may do some changes in order to have the best performance for their application. The reference design you refer to was done by the DLP group, I will draw their attention to this post and they will explain you best their motivation for choosing this value of L.

    Best regards,

    Diaara

  • Diaara san,

    Thank you for your reply always!

    Do I understand correctly that the faulty boards have good outputs when you remove the panel? or you meant something else?
    >No, regardless of the panel, output was abnormal.

    I will draw their attention to this post and they will explain you best their motivation for choosing this value of L.
    -> Thank you very much for your cooperaiton!

    And then, our cusotmer changed D1 and TPS65145 from old one to new one.
    As the result, they got normal voltage.
    Thank you for your advice.
    We are looking for the cause of the failure(diode broken) now.

    Kind regards,

    Hirotaka Matsumoto

  • Hello Hirotaka,

    What is the output current of the boost converter? Can your customers check as well the ratings of the diode they use.

    Best regards,

    Diaara

  • Diaara san

    Thank you very much for your cooperation!

    We confirmed that the ratings of the diode they use is not enought.
    Especially, "Surge non repetitive forward current"(transient, 10ms) is 5.5A.(it is small in case of start operation current)
    As the result, we encourage to use big one.

    If Vout(8.5V) is shorted(abnormal condition), is there a possibility to break the Q2(FET between SW and SUP) on the datasheet P7? 
    If you know above, could you let us know?

    We appreciate for your help.

    Kind regards,

    Hirotaka Matsumoto

  • Diaara san

    If you have some comment could you give us it?

    Kind regards,

    Hirotaka Matsumoto