TPS65400: Could you kindly help to check the schematic of TPS65400 and give some suggestions about some issue?

Hi,

i have reviewed the schematic.

1. 4 EN pins connectin is ok.

2. VDDD pull up the SDA, SCL, RST_N pin is ok too.

Hi, Zhao

Thanks for your kindly reply!

For item 2 and 3,  we will follow your comments.

As for item 1,  the value of C148 and C151 in our schematic is  based on TI's WEBENCH Designer.  In our design, the output 3 is D3V3@0.22A, and output 4 is D2V5@0.12A.  The current of both 2 outputs are very small. I guess your comments is based on the output current is 2A, right?

I creat a design example of TPS65400 using WEBENCH Designer, I set the output 3 is D2V5@2A, and output 4 is D2V5@0.2A. In the design, the Cc of  COMP 3 is 1.2nF, and Cc of COMP 4 is 33nF. Different current will need different Cc, right?

Do we need changed the Cc in our design?  Also, the compensation circuit is Cc combines with Rc. If we change the Cc, the Rc should also be changed accordingly, right?

Thanks!

Hi, Sir

Yes, my comments are based on output curent=2A.
Generally speaking, if loop is stable @ CCM, the loop will be stable @PSM too.
When Iout is small(0.12A or 0.22A), IC will work in PSM, i think when C148 =C151 =4.7nF, the loop will be stable too.

Of course, i think the calculation of WEBENCH Designer is right too, but it is over design.
when Cc=22nF or 33nF, i think the loop is also stable, but the bandwidth will be reduced.

So Cc=22nF or 33nF or 4.7nF are all ok, selection is up to you .  
 
You can keep Rc value, or set Rc same as EVM value(15.4kohm).