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UCC39002: When does Adjust Amp start normal operation?

Part Number: UCC39002
Other Parts Discussed in Thread: UCC29002

 Hello guys.

 One of our customers is evaluating UCC39002. According to their report, it seems that the plus input voltage of Adjust AMP in the function block diagram is pulled up to 3V by high side NMOS controlled by Start Up and Adjust Logic block when the system output current is about zero because ADJ terminal sinks about 6mA with 0V EAO terminal voltage. Also the ADJ sink current is reduced when the system output current is about 2A (the sense resistor between CS+ and CS- is 1.25mohm).

 So could you please tell me when the high side NMOS controlled by Start Up and Adjust Logic block is turned off after UCC39002 enabled by powered up?

 Your reply would be appreciated.

 Best regards,

 Kazuya Nakai.

  • Hello Nakai-san,
    At startup the load share amp is disabled and the adj amp is forced to sink max current through the adjust resistor. This ensure that the power module controlled by the UCC39002 will quickly engage in load sharing.
    The load share drive and adjust amp revert to normal operation as soon as the measured current exceeds 80% of the average per module current as represented by the LS bus voltage.
    Regards
    John
  • Hello John,
    Thank you very much for the prompt reply.
    But I can't understand what the meaning of 80% of the average per module current as represented by the LS bus voltage.
    Could you please tell me deeply what the meaning is?

    Thank you and best regards,
    Kazuya Nakai.
  • Hello Nakai-san,

    It just means that load sharing is controlled after the current detected by the current sense amplifier is within 80% LS signal.

    The LS signal is the current signal of the module with the highest current output.. The other modules are forced to follow this module.

    But they are only controlled by the UCC39002 after they have reached 80% of the LS signal.

    This forces each module to turn on fast.

    Regards

    John

  • Hello John,

    Thank you very much for your reply. Could I ask you again?
    In the other words, the load sharing is started when the output voltage of the current sense amp is higher than 80% of LS terminal voltage. Is this correct?
    If this is correct, what voltage is 80% of LS terminal voltage before the load sharing is started? I think LS terminal voltage is almost 0V before the load sharing is started because the analog switch located between the output of Current Sence Amp and the non inverting terminal of Load Share Bus Drive is disconnected. So I think 80% of LS terminal voltage is almost 0V. Is this correct?

    Could you please give me your reply?

    Thank you and best regards,
    Kazuya Nakai.
  • Hello Nakai-san
    When the power supplies are turned on they will start outputting a load current.
    The UCC39002 powers up at 4.375V
    The load share controllers detect the current from each module and the highest value is set as LS.
    They will dynamically track LS until the output reaches its set point
    Its 80% of this LS value
    John
  • Hello John,

    Could you please let me confirm the timing of ADJ terminal 6mA sink current finishing at start up again?

    The 6mA sink current at start up is finshed when CSO terminal voltage is exceeded 80% of LS terminal voltage?

    Is this correct?

    Thank you and best regards,
    Kazuya Nakai.
  • yes that is correct

    Regards

    John

  • Hello John,

    Could I ask you about UCC39002 function again?

    1. When is UCC39002 entered to "Start Up" mode. Is it VCC powered up timing?

    2. According to the customer evaluation result, when LS terminal voltage is pulled up to more than about 500mV by another UCC39002, it seems that the UCC39002 goes into "Start Up" mode then because ADJ terminal sink current increased sharply. Is there any condition to enter "Start Up" mode except VCC powered up?

    Thank you very much and best regards,
    Kazuya Nakai.
  • Hello Nakai-san,
    What condition causes the other load share module to cause LS to pull LS more than 500mV ?
    Is this other module suddenly turned on in the system?
    Can you draw a diagram to explain what is going on ?
    Regards
    John
  • Hello John,

    Thank you very much for the prompt reply.

    I will send you some diagrams and waveforms next week.

    Thank you again and best regards,
    Kazuya Nakai.
  • Hello John,

    Could you please tell me what different point between UCC39002 and UCC29002 functions is? Through I read the device datasheet, I couldn't understand what the different point is.

    Thank you and best regards,
    Kazuya Nakai.
  • Hello John,

    The customer uses UCC29002/39002 for their products now. They'd like to get your answers for the following questions. Could you please give me your answers? I attached a file I wrote their questions too. Please take a look it?

    Q1. When is disconnection switch opened? And when is it closed?

           Also the switch open/close timing are different beween UCC29002 and 39002?

    Q2. When is the high side NMOS FET controlled by "Start Up and Adjust Logic" block turned on?

            And when is the FET turned off? Also the FET on/off timing are different beween UCC29002 and 39002?

    Q3. When is the low side NMOS FET controlled by "Start Up and Adjust Logic" block turned on?

    And when is the FET turned off? Also the FET on/off timing are different beween UCC29002 and 39002?

    Thank you very much and best regards,

    Kazuya Nakai.

    UCC29002_39002_questions041318.pdf

  • UCC29002_Disconnect.pptxHello Kazuya,

    There is no timing differences between the UCC29002 and the UCC39002

    The operation of the disconnect switch is described in the attached document

  • Hello John,

    Thank you very much for your reply and the attached PPT document making. The document is very helpful for me. I could understand UCC29002/39002 operation at start up deeply by it.
    Could I ask you a few additional questions? You said that no timing differences between the UCC29002 and the UCC39002. But the device sheet (SLUS495I) says that "The UCC29002 and UCC29001 does not have this logic at start up. In this way, the UCC2900x does not adjust the output of the module to its maximum adjustment range at turn on and engages load sharing at more moderate rate." as you said before. So the customer and we thought that ADJ amp doesn't force to sink MAX current in UCC29001/2 case. Is this description wrong? If so, what is difference between UCC29002 and 39002? Is it the deivce operation temperature only?

    Thank you very much again and best regards,
    Kazuya Nakai.
  • Hello Nakai-san,

    There is an error in that document.

    It should say that the UCC29002 and the UCC39002 has the startup logic.

    The UCC29002-1 does not have the startup logic.

    Sorry about the confusion.

    The only difference between the UCC29002 and the UCC39002 is the temperature rating

    Regards

    John

  • Hello John,

    Thank you for your reply. I understood that the UCC29002-1 does not have the startup logic not UCC29002-1.
    Does UCC29002-1 mean parts number UCC29002D/1? (D package only?)

    Thank you and best regards,
    Kazuya Nakai.
  • Hello John,

    The customer needs the device which doesn't have start-up mode because they want to avoid 6mA IADJ current sinking at start-up period.
    Then do they have to choose UCC29002D/1?

    Thank you and best regards,
    Kazuya Nakai.
  • Hello Nakai-san

    John is travelling on business this week.

    You are correct - the customer should choose the UCC29002D/1 this device does not include the startup logic.

    Regards
    Colin
  • Hello Colin,

    Thank you for your reply!

    Best regards,
    Kazuya Nakai.