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bq76920, bq76930, bq76940 AFE FAQ Question

Other Parts Discussed in Thread: BQ76920, BQ76930, BQ76940

At www.ti.com/.../sluub41.pdf
bq76920, bq76930, bq76940 AFE FAQ
9.5 Is it okay to balance adjacent cells?

If 2 adjacent cells are balanced, the VCx pin between the cells does not change significantly in voltage. The differential input voltage of the next cell effectively doubles.
==>What is the meaning?


As described at 9.5:
As an example, assume all cells are at 4 V. If cells 4 and 5 are balanced, the VC3 input pulls to VC4,
which is approximately the cell 4 voltage or 16 V.
VC0--(cell 1)--VC1--(cell 2)--VC2--(cell 3)--VC3--(cell 4)--VC4--(cell 5)--VC5
==>
VC3, VC4, VC5 at the same voltage?
what is the voltage of VC0, VC1, VC2, VC3, VC4, VC5 when cell4, cell5 are balanced?
How come VC3 input pulls to VC4? VC4 input pulls to VC3???

VSS-VC0 above the absolute maximum is 3.6V? Does it mean that cell 1 cannot be balanced? because that VC0 pulls to the cell 1 value of 4 V?

Thanks

  • Hi Matt,

    If 2 adjacent cells are balanced, the VCx pin between the cells does not change significantly in voltage. The differential input voltage of the next cell effectively doubles.

    ==>What is the meaning?

    When a cell is balanced, an internal FET puts a small resistance between the inputs. If all resistances match well and only 1 cell (cell(n+1)) is balanced VC(n+1) moves down by 1/2 the cell voltage and VCn moves up by 1/2 the cell voltage. If 2 adjacent cells (cell(n+1) and cell(n)are balanced, VC(n+1) moves down 1 cell voltage, VC(n) does not move, and VC(n-1) moves up 1 cell voltage. So VC(n+2) to VC(n+1) is 2x Vcell, VC(n+1) to VC(n) is 0, VC(n) to VC(n-1) is 0, and VC(n-1) to VC(n-2) is 2x Vcell.

    As described at 9.5:

    As an example, assume all cells are at 4 V. If cells 4 and 5 are balanced, the VC3 input pulls to VC4,

    which is approximately the cell 4 voltage or 16 V.

    VC0--(cell 1)--VC1--(cell 2)--VC2--(cell 3)--VC3--(cell 4)--VC4--(cell 5)--VC5

    ==>

    VC3, VC4, VC5 at the same voltage?

    Yes

    what is the voltage of VC0, VC1, VC2, VC3, VC4, VC5 when cell4, cell5 are balanced?

    VC5 = VC4 = VC3 = 16V

    VC2 = 8V

    VC1 = 4V

    VC0 = 0V

    How come VC3 input pulls to VC4? VC4 input pulls to VC3???

    Because cell 4 connects between VC4 and VC3 and both cell 4 and cell 5 are being balanced.

    VSS-VC0 above the absolute maximum is 3.6V? Does it mean that cell 1 cannot be balanced? because that VC0 pulls to the cell 1 value of 4 V?

    Cell 1 can be balanced. If cell 1 is balanced and cell 2 is not, VC0 = VC1 = Vcell1/2. For 4V VC0 = VC1 = 2V and all is fine.

    If you try to balance cell1 and the adjacent cell 2, VC0 = VC1 = VC2 = 4V and VC0 has exceeded abs max. Don't balance adjacent cells.
  • Hi Matt,
    The formatting tool is not working today, hope you can find the answers above.