Hello,
I am using the UCD9090A to run margining on a design.
I have the following rails that I want to margin
1) VPH - margin between 1.8V+/-10% or 1.98V - 1.62V.
2) VP - margin between 0.85V+/-10% or 0.935V - 0.765V.
I am margining linear regulators which have a control voltage of 0.5V. Using the margining circuit design tool spread sheet I obtain values for R3, R4 and C1 for each of these rails
For VPH I get values for the margining limits SP8_VPH_UCD90xxx Margining Circuit Design Tool.xlsxSP8_RevA_DEBUG_UCD9090A@PMBusAddress104d_Project_0618_2018_v2.xmlas 1.981V (0%) and 0.825 (100%) and a nominal of 16% (1.8V)
To enable the margin and margin direction I assigned margin enable and margin low/not high GPIs. the nominal margin PWM % is 16% @ 368kHz
To margin VPH to 1.98V I want to enable the margin and decrease the PWM % to 0% (decreasing duty cycle will increase the voltage)
To margin VPH to 1.62V I want to enable the margin to increase the PWM % to 30% (increasing duty cycle will decrease the voltage)
My question is the following
Q1. I am uncertain as to how I control the margin voltage control (PWM %). How do I set my margin limits to keep my margin between 0% and 30%
Q2. I have two rails that I want to margin. Can I move them in different directions or do I need to margin both in the same direction.
I have included my design file and the spread sheet for one of the rails for your perusal.
Regards,
Guy
