LM5116: Step-Down Converter is outputting 8 V instead of 36 V

Patrick,

You can use WEBENCH to double-check your schematic. Go to the LM5116 product page and enter your specs in the WEBENCH box (on the right, scroll down a bit). In WEBENCH you can enter your schematic values and use the recomp tool to check your compensation. From there you can run sims and check other features of your design.

Layout:

• The high di/dt loops have thick traces (polygons, good) but the loop area is large (bad). The inductor could be placed right next to the FETs and AW3B/2B could be moved away.
• The 2.2uF CIN caps should be the closest to the FETs. These handle the highest frequencies in the transients so you want as short a trace/loop (smallest inductance) as possible.
• Some of the nets see unrouted in the layout. RFBT to VOUT for example.
• The SW node should be smaller. It extends far to the right side of the board which just adds area which adds capacitance (and inductance) and will cause bad EMI (and might harm normal operation).
• Check the EVM and datasheet for more layout guidelines.

The air wires are not a problem (but the ones on SW will make EMI worse).

As for bench debug I'd recommend checking the switch node. Does it look stable? Do the other pins look as expected?

-Sam

Hi Sam,

thanks for your reply and your helpful tips! I did use webbench for a first shot. And I also used TINA to simulate my circuit. Simulation results looked okay to me (see image attached) but the physical circuit seems to behave differently.

As you recommended I changed the position of the 2.2uF CIN Caps and also tried to decrease the loop size and size of the SW node by cutting it smaller. But it showed no effect on the output voltage, which is still 8 V, so the big issue has to be something else. R_FBT is by the way connected to VOUT by Airwire 3, R_UV2 to VIN by Airwire 1 and C_BOOT to SW by Airwire 2 (not connected in Eagle but jumpered on the PCB).

I also checked the switch node with an oscilloscope and your assumption was right, it is not stable at all (see image). What can possibly cause this issue? Faulty connections maybe? (Always hard to solder SSOP by hand).

Kind regards

Patrick

Patrick,

You can try moving the AW_3B FB connection closer to the point where you're sensing VOUT.

You can try connecting the GND planes together at multiple points at the gap between the GND planes.

You can try lots of things but it's better to probe around to find what node(s) is actually causing your issue. Use the scope to check each pin and compare with the simulation. Where do you see a discrepancy?

-Sam

Hi Sam,

thank you again for your help. I tried moving the feedback connection closer to the output and connecting the GND planes, but that had no effect either. Today I added a snubber network across the low side mosfet (as suggested in the datasheet) trying to reduce the ripple of the switch node. As the ripple frequency was approximately 1 MHz i used a 47 Ohm resistor and a 22 nF capacitor. When I tested the circuit again the output voltage was now only 4,5 V.

With the snubber built in I checked a few nodes with the oscilloscope. I noticed that  the high side gate voltage HO (against SW) is fairly low. It´s only about 2,5 V peak to peak (but 9 V in the TINA simulation). The LO gate voltage was 6,88 V peak to peak but it was a very short pulse. But this short pulse shows, that the circuit is trying to raise the output voltage, right? Do you know what is going on here? Is there mabe something wrong with the high side switch/bootstrap circuit? Any tips where to take a closer look?

Kind regards

Patrick

Patrick,

You could increase cboot but I don't think this is the issue.

Check to make sure VIN is stable at the IC.

HO should be VIN + Vboot. Check the boot cap voltage. Check VCC. Anything off there?

Is SW higher than HO? That how it looks from your scope shots. That shouldn't be the case.

-Sam

Hi Sam,

I checked and VIN ist stable (55 V) at the IC. VCC is also stable and about 7,4 V.

The SW potential seems to be a problem. It doesn´t oscillate between VIN and GND as it should, but between zero and 4,8 V approximately. So it looks like the high side FET is not working properly. The voltage between SW and HO is 2,5 V (see pictures above) and this is the FETs gate source voltage right? This is in the range of the Si7850 FETs threshold voltage, but 5 to 10 volts would be better to turn it on completely right?

I already changed the high side FET for a new one, thinking I could have damaged it, but the results were the same.

Any idea why HO could be so low?

Thank you and kind regards

Patrick

Patrick,

It sounds like the high-side gate driver is having an issue so check the components which create the high-side gate drive signal. Check HB, test D1, test the bridges to make sure they're 0-ohms.

Try swapping the LM5116 for a new IC. Maybe there is some ringing somewhere (SW node maybe) which violates the abs max of a pin which could damage the device.

-Sam

Patrick,

Great to hear it's solved. Would you mind giving me the part numbers for each diode. I'd like to look into this.

-Sam

Hi Sam,

sure, no problem. First I used the SS28 (part number 2454187 on https://de.farnell.com/

(sorry, the link destroyed my post)

... Trying to get the cicruit to work I then used the TS4148 RXG I also use across R_UV2 (part number 2708388 on https://de.farnell.com/). (This also hab a slight effect on the output voltage, I think it went up from 4,5 V to approx. 5 V).

Now I´m using the BAV19WS (part number BAV 19WS on https://www.reichelt.de/) and it seems to be working fine.

Kind regards

Patrick