TPS61236P: TPS61236P layout review

Eric Lo72350

Part Number: TPS61236P

Hi sir

pls help to review TPS61236P layout and give me your comment, thanks!!

Eric Lo

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/196/K500_2D00_UHF_2D00_RFID_2D00_V0.1_5F00_20190117.asc.7z

over 6 years ago

0 Zack Liu over 6 years ago

TI__Mastermind 34231 points

Hi Eric,

Could you also send me the schematic file for letting me easier to check? Thanks.

0 Eric Lo72350 over 6 years ago in reply to Zack Liu

TI__Intellectual 915 points

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/196/K500_2D00_UHF_2D00_RFID_2D00_R0.1_5F00_20190117.sch.7zattach schematic

0 Zack Liu over 6 years ago in reply to Eric Lo72350

TI__Mastermind 34231 points

Hi Eric,

For some reason, this schematic file is blank if opening it with Altium designer. You could upload it as a picture or PDF. Thanks.

0 Zack Liu over 6 years ago in reply to Zack Liu

TI__Mastermind 34231 points

Hi Eric,

I'll close this thread. You can continue send post later.

0 Eric Lo72350 over 6 years ago in reply to Zack Liu

TI__Intellectual 915 points

Hi Zack

here is the schematic.

Eric LoK500-UHF-RFID-R0.1_20190117.pdf

0 Zack Liu over 6 years ago in reply to Eric Lo72350

TI__Mastermind 34231 points

Hi Eric,

It seems the layout is not finished, right?

Here are my comments:

1. Please refer to the recommended layout in the datasheet. The most critical current path for all boost converters is from the swithching FET, through the synchronous FET, the output capacitors, and back to the ground of the switching FET, The output capacitors and their traces should be placed on the same board layer as the IC and as close as possible between the VOUT and PGND pins of the IC.

2. There is a polyregion on PL1, It should be removed. Place C9 close to U1 and supply a stable Vin voltage. Place C3,C4 close to VOUT, GND pins of the IC.

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TPS61236P: TPS61236P layout review