Other Parts Discussed in Thread: UCC28630
Hello
We have developed one AC/DC and DC/DC card using TI ICs .
Can you please review it once.
Regards
Akash Jain
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Hello Peter,
Please note my comments below.
AC_DC
RT1 & 2 could be combined into one RT device: We need L/N reversal protection so RT1 and RT2 are separate
.
Replace C3 to C6 with one 68uF cap? Webench selects parts from a limited database and sometimes picks multiple parts where one device is a more effective solution but that device may not be in the Webench database.: We will do it.
C7, is this a film cap, film caps are more robust than high voltage ceramics: Its ceramic cap
Q2, R8 and D6 circuit can be removed as they add little value for 12V design: We will see.
C26 should be in parallel with series circuit for R22 and C27: Yes as per datasheet it should be in parallel. but as per webench design, it is parallel only with the R22. Please clarify on this point.
R11 to 10k
DC-DC
FS1 3A rating too low, at 12V 60W output input current will be greater than 5A, consider 8A fuse?: yes , we will update it.
Vin min is 12V therefore UCC28C42 will not startup as turn-on is 14.5V, consider the 43 or 40 variant
R25 and R28 need to be reduced in value as at 12V input it could take a long time for C44 to charge to the Vcc UVLO turn-on value: My input is not 12V, its ranges from 44 to 55.5V and output is 12V.
R30, Q3 and D13 circuit can be removed for 12V output, C50 needs to be in parallel with R43 and C51
R34 to 10K: the Same query as AC_DC, please clarify
Please check T2 primary inductance and turns ratio value - what equations were used ?: Primary inductance is 63uH.
I have updated my design on webench as per my calculations and shared a public link for same. Please go through it.
https://webench.ti.com/appinfo/webench/scripts/SDP.cgi?ID=9314612C8D52DBDB
https://webench.ti.com/appinfo/webench/scripts/SDP.cgi?ID=398595656EA35102
Thanks and Regards
Vishal Kakade
Hello Peter,
I have designed external circuits which give me input UVLO/OVLO alarm signal at 3.3V and 0V.
My UVLO alarms is a transition from 3.3V to 0V, OVLO alarms is a transition from 0V to 3.3V.
I want to use these alarm inputs to disable UCC28C42.
I am connecting UVLO alarm to CS pin through an optocoupler. and UVLO alarm to COMP pin through an optocoupler. in order to disable the controller at Lower and Upper threshold.
Please go through my design and let me know for any other alternative or reviews.
Regards
Vishal Kakade
Hello Petrer,
Yeah, I know but you suggested a different part for implementation. In the datasheet of Ucc28C42(page no: 19) it is mentioned that UCC28c42 can be disabled by pulling comp pin to low or CS to high. Using these I have designed my circuit. Can you verify it?
I am not able to simulate the complete design in TINA also. I am attaching the circuit if you can make it work in tina then I can do the rest.
Hello Peter
Thanks for all the review points.
Can you please also check if need to add anything more the EMC/EMI also?
Regards
Akash Jain
Hi Vishal,
There is a Varistor V1 fitted to the UCC28630.
This will help manage line surge, pleas note that EVM's may not have been submitted for AC line surge testing.
Regards
Peter