Dear Team,
Please kindly help to confirm where my schematic needs to be modified, as +12V and +5V output phase low-side MOSFET(Q38&Q8) is always damaged.
what is the most likely cause of damage?
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Dear Team,
Please kindly help to confirm where my schematic needs to be modified, as +12V and +5V output phase low-side MOSFET(Q38&Q8) is always damaged.
what is the most likely cause of damage?
Hi Tommy,
The schematic looks well. I have just one concern. FB divider resister is too small. it's suggested to use 43k ohm and 10.5kohm. But I'm not sure it's the root cause.
BRs,
Edwin.
Hi Edwin,
thanks for your reply, please refer to the attachment file for the layout board file/ MOS 8D report/ switch node phase waveform.
if have any idea please let me know, because next week is chinese new year,so if need me to provide other information will be late,sorry.RSC-IMX61_E1907RSC603RO_A1_20150729-1000.rar496359_FDMS0312AS_Final+Report.pdfPhase pin waveform for Ti measured 20190201.docx
Hi Tommy,
From the waveform, seems SW OS can't bigger enough to damage L-MOS.
Do you check the Dead time whether is bigger enough? and When the damage happen? if possible, could you please catch some waveform during the damage happen?
Hi Tommy,
Confused why the Vin looks higher than the value in the word " Phase pin....20190201" you uploaded before? this time the waveform are almost getting 30V VDS which is Mosfet spec.
And if we check dead time, we should check VGS of High-side not only Vgate.
I think we can close this thread and discuss more about this question by Email, you can send to yuchang-zhang@ti.com
Yuchang