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Original question:

TPS61196: TPS61196 Multi-chip operation Issue

TPS61196: Mult-Chip appliaction consulting

Fandy
Expert 2285 points
Part Number: TPS61196

Hello

when TPS61196-Q1 work in master/slave mode,the OVP was determined by Slave or Master chip ? and why Slave's OVP voltage must be 3% higher than the voltage at the Master's OVP pin ? thanks

  • 0
    TI__Mastermind 22745 points
    Hi Fandy,
    If OVP really occured, it should trigger master OVP first, and it may trigger slave OVP later. So the OVP was determained by the Master first, if the voltage is really high, it will trigger both.
    We add 3% margin for master device to establish voltage loop not affected by the slave device. When it power on, we don't want the slave device affect our application.
    Regards
    Sean
  • 0 in reply to Sean Zhou
    Expert 2285 points
    Hi Sean
    the OVP Voltage = (1+Rtop/Rbot)*3.02 , refer to SCH of Figure 21. Multi-Chip Operation In Parallel , the Calculated Slave's OVP voltage must be lower then Master' OVP, so how to ensure the " The slave's OVP pin voltage must be 3% higher than the voltage at the master's OVP pin. "
  • 0 in reply to Fandy
    TI__Mastermind 22745 points
    Hi Fandy,

    You can refer to datasheet Figure 22 , you can add a resistor between Master'OVP point and Slave's OVP point. The higer means the slave device should trigger OVP before the master device.

    Regards
    Sean
  • 0 in reply to Sean Zhou
    Expert 2285 points

    Hi Sean

    " The slave's OVP pin voltage must be 3% higher than the voltage at the master's OVP pin. " Acording to this demand, Slave's setted OVP of Vboost will less than Master's setted OVP of Vboost, so if OVP happened, it should trigger Slave's OVP first, then trigger Master's OVP latter. is it right ?

  • 0 in reply to Fandy
    TI__Mastermind 22745 points
    Hi Fandy,
    Yes, your understand is totally right.
    Regards
    Sean