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Original question:

TPS65218D0: TPS65218D0 starts to power up then shuts down

TPS65218D0: Questions about power down sequence and others.

Kazuya Nakai59
Guru 21585 points
Part Number: TPS65218D0

 Hello guys,

 One of my customers is going to use TPS65218D0 for their next products and they are evaluating this devie using TI EVM.

 They hve a few questions about TPS65218D0. Could you give me your reply?

Q1. Is there any sequence limitation of TPS65218D0 side not CPU side when the device is powered down?

       They customer knows that the difference voltage between "VDDS" and "VDDS_CLOCKOUT、VDDSHVｘ、I/O power" must be within 2V.

       What's else?

 Q2.  Can UVLO voltage be adjusted by Config 1 register?

        Also is the UVLO voltage applied to all DC-DC and all LDO?

Q3. When DCDC5, DCDC6, LDO1 and LS1 are not used, can terminals "L5, FB5, L6, FB6, IN_LDO1, LDO1, IN_LS1, LS1" be leave open?

 Your reply would be much appreciated.

 Best regards,

 Kazuya Nakai.

 

 

  • 0
    TI__Intellectual 950 points
    Hi Nakai,

    Your questions has been forwarded to responsible applications engineer and he will answer to you as soon as possible. Thanks

    Tuomo
  • 0
    TI__Mastermind 30310 points
    Nakai-san,

    Q1. The TPS65218D0 automatically follows reverse power-up sequence for power-down.
    Q2. Yes, this is input voltage UVLO (at VIN_BIAS pin). Output voltage supervisor specs are named VPG and VOV
    Q3. See page 93 of TPS65218D0 datasheet, 6.1.2 Applications Without Battery Backup Supplies, which shows the proper termination of Back-up battery domain when it is un-used.
  • 0 in reply to Brian Berner
    Guru 21585 points
    Hello Brian,

    Thank you very much for the prompt reply.

    Could I ask you a few additional questions?

    Q1. Does the output signal of UVLO which monitors VIN_BIAS pin voltage initialize all DCDC and all LDO?

    Q2. Can LS1 pin and IN_LS1 pin be left open when LS1 is not used?

    Thank you again and best regards,
    Kazuya Nakai.
  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 30310 points
    Nakai-san,

    Q1. The answer to this question depends on the termination of the AC_DET pin. If the AC_DET pin is shorted to GND, then the answer is YES.

    If AC_DET is connected to VSYS (main system power), then the power-on sequence is triggered by a combination of VINBIAS>UVLO && PB pin toggle (push-button press).

    If AC_DET is pulled up by default but triggered by a FET to go low, then the system can power on when power is applied, without a push-button press (see Figure 5-27. AC_DET Pin Configurations on page 43 of the TPS65218D0 datasheet).

    Q2. I short LS1 and IN_LS1 to GND when this load switch is un-used, and also connect GPO2 to GND (because it is connected to LS1 when it is wired as a push-pull output), but I also see no issue if you leave all these pins floating.