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BQ77915: CHG and DSG MOSFETs are not turning on for stacking interface

Alex Mazur1
Prodigy 95 points
Part Number: BQ77915

Hello,

I am having an issue with my 7 cell balancing design using the BQ77915. I am using resistors and a power supply to test my PCB. Below are the voltages I am seeing for each module (each voltage is referenced to the local VSS of each device):

TOP:

  1. PRES = 15.47V
  2. VDD = 15.48V
  3. AVDD = 3.05V
  4. CCFG = 3.05
  5. DSG = 12.58V
  6. CHG = 12.58V
  7. TS = 0V (This did not make sense to me)
  8. LD = -11.64V
  9. LPWR = 3.05V
  10. CBI = 2.26V

BOTTOM:

  1. PRES = 14.66V
  2. VDD = 11.62V
  3. AVDD = 3.03V
  4. CCFG = 0V
  5. DSG = 0V
  6. CHG = 0V
  7. TS = 0V
  8. LD = 0V
  9. LPWR = not connected
  10. CTRD = 12.04V
  11. CTRC = 12.04V

Attached is my schematic for reference. Please note: the pres pin for the top device in the stack is pulled up to PACK+ through a 10K resistor. Also, I modified the TS pin connections for each device in the stack. Instead of using an NTC for each, i used a 10K resistor to simulate ambient temperature.

Please let me know if you need any additional informationBQ77915.pdf

  • 0
    TI__Expert 7455 points

    Hi Alex,

    For cell balancing to happen a few conditions need to be met first. They are described in 9.3.4 of the datasheet. They are:

    • The CBI pin needs to be pulled low.
    • The batteries need to be charging. Check section 9.3.8 of the datasheet for exact qualifications.
    • The cells need to be at at least 3.8V.
    • No device can be in fault condition

    I have also reviewed your schematic and have some feedback:

    1. If you are using external cell balancing, the Rin values should be 1k, not 33. The Cin should be 0.1uF, not 1uF.
    2. The LD pin of the top device needs a 1MOhm pull down resistor to the device's local ground to protect the pin.
    3. On the bottom device Rdsg (R35 in your schematic) should be 4.5kOhm.
    4. On the bottom device Rchg (R36 in your schematic) should be 1kOhm.
    5. On the bottom device Rgs (R38 in your schematic) should be 3.3MOhms. 

  • 0 in reply to Shawn Hinkle
    Prodigy 95 points

    Shawn,

    I made the changes changes you recommended to my schematic, and i still cannot get the CHG and DSG  FETs to turn on. Another behavior that I have noticed is that whenever I connect my electronic DC load (DC load is in standby and not drawing any current), the LD pin on the bottom device gets pulled high.

    Please let me know if you need any additional information.

    Regards,

    Alex Mazur

  • 0 in reply to Alex Mazur1
    TI__Expert 7455 points

    Hi Alex,

    If both of the FETs are off, there are several possible faults that could be occurring:

    • Open Wire. This occurs when the (Vcx - Vcx-1) < Vow for a delay time. This fault is described in section 9.3.2.3 of the datasheet. If any of the cell voltages are measured to be below the OW threshold, which is around 500mV.
    • OCD or SCD. This occurs when (Vsrp - Vsrn) < Vocd1/2 for a delay time. This fault is described in section 9.3.2.4 of the datasheet. If the load across the sense resistor is too high and causes a voltage below the over current discharge threshold (this value varies by part number, but will be around -60mV) the device will trigger this fault.
    • OTD or UTD. This seems unlikely, but still worth double checking. 

    Please check to see if any of these faults are occurring and take the necessary steps to recover from them as described in table 5 of the datasheet.

  • 0 in reply to Shawn Hinkle
    Prodigy 95 points

    Shawn,

    I am still having issues finding where the fault is occurring. What other debugging steps can I take? Is there an easy way to check if I have somehow damaged the IC that I have been testing with?

    Regards,

    Alex Mazur

  • 0 in reply to Alex Mazur1
    TI__Expert 7455 points

    Hi Alex,

    Refer to Table 5 in the datasheet for a description of the faults, how they occur, and how to recover from them. I've already pointed out the ones I am suspicious of, but it is good to use it as a checklist. Probe the appropriate pins and verify that they are in the condition you expect. 

    Validating the IC is a very long and intense task, there is no way to do it quickly and simply since there are so many features on the device. The device would only be damaged if you violated one of the absolute max ratings for the pins. These are described in section 8.1 of the datasheet.