TPS544C20: hiccup mode

Fujiwara,

1. If I set hiccup mode and TPS544x20 detects OC_FAULT(STATUS_WORD low byte bit 4 is set "1"), PGOOD will goes low. Is my understanding correct?

1a) The TPS544x20 senses to OC_FAULT by detecting the Low-side FET current at approximately the mid-point of the low-side FET ON period for each switching cycle.  Each switching cycle that senses a low-side FET current in excess of the programmed IOUT_OC_FAULT_LIMIT, the counter will increment 1.  Each switching cycle that does not sense a low-side FET current in excess of the programmed IOUT_OC_FAULT_LIMIT, the counter will decrement 1.  If the counter increments to 7, an OC_FAULT will be declared.

Set the OCF bit in the STATUS_IOUT command, which will Set the IOUT bit in STATUS_WORD

Set the IOUT_OCF bit in STATUS_WORD & STATUS_BYTE

Disable the Output (Disabling the Output will Assert PGOOD low and Set the PGOOD# bit in STATUS_WORD = 1)

If RESTART (HICCUP) is selected in IOUT_OC_FAULT_RESPONSE, start a hiccup counter to wait for Restart.

2. If so, STATUS_WORD high byte bit 3 is also set "1", correct?

2a) STATUS_WORD bit 10 (High Byte 3 - PGOOD) is set to 1 if PGOOD is pulled low.

3. If so, is it possible to STATUS_WORD high byte bit 3 is not set "1"?

3a) STATUS_WORD high byte Bit 3 (PGOOD#) is a live reflection of the PGOOD pull-down device.  PGOOD will be pulled low if the output has been disabled by an IOUT_OC_FAULT

4. If TPS544x20 detects OC_Fault, TPS544x20 will work by hiccup mode, correct?

4a) The TPS544x20 can be programmed to operate by Hiccup Restart or Latch Off depending on the setting of IOUT_OC_FAULT_RESPONSE [5:3].  When RS[2:0] = 7, the TPS544x20 will restart continuously (Hiccup)  When RS[2:0] = 0, the TPS544x20 will shut-down and not restart (Latch Off) until Disabled and Enabled.

5. If OC_Fault condition removes very quickly after OC_Fault detected, does TPS544x20 skip the hiccup mode?

5a) An OC Fault Condition that is shorter than the 7 PWM cycle counter used to detect and Over Current Condition described in the answer to 1 will avoid the shut-down and restart (Hiccup) fault response.  A short OC event that does not trigger the 7 PWM cycle counter will not set the IOUT_OCF status bits either.

For question 5, my understanding is that TPS544x20 will report STATUS_WORD=0x4810 if TPS544x20 detects OC_FAULT (counter increments 7), correct?  Customer reported that he got a STATUS_WORD=0x4010 during high load current in aging test. It is rare case but it seems TPS544x20 detected OC_FAULT and not detected PGOOD="L". DoesTPS544x20 could be reported a such respond? Customer want to know  there is a possibility that TPS544x20 can respond STATUS_WORD=0x4010 or not.

I have one question. STATUS_WORD low byte bit 4 will be clear if OC_FAULT condition is removed, correct?

Fujiwara,

There are 2 types of Status Bits defined by PMBus.  Latched Warning and Fault Bits and Live Status Bits.

PGOOD and OFF are live status bits.  They reflect the current state of the converter.   So the PGOOD bit will reflect the state of the PGOOD pin at the moment of the read of STATUS_WORD.  If the read occurs while the converter is in hiccup and waiting to restart, the PGOOD bit will be 1, indicating that PGOOD is being asserted low, but if the read occurs while the converter is converting, and it has completed soft-start but not declared a new fault the PGOOD pin voltage would be high so the PGOOD bit will be set to 0.

By Contrast, the OC Warning and OC Fault are latched warning and fault bits that retain past warning and fault information until they are cleared by the CLEAR_FAULTS PMBus command, or by disabling and enabling the converter via the CNTRL pin.  After an Over Current event, even if the output recovers the OC Warning and OC Fault bits will be set