Tool/software: WEBENCH® Design Tools
Since the external MOS of the chip has higher requirements on Qg, and low Qg MOS is more expensive, the circuit is modified as shown in the schematic diagram.Meet the following questions:
1. Whether it is feasible to use the external driving voltage to drive the MOS tube;
2. Although the lower tube still USES totem pole, but the front drive is only 7.5v, will the MOS drive effect be bad?
3. If the upper tube is connected according to my method, whether the driving voltage is VCC_DRV? I see that your internal seems not to be complicated, and there is no clamp
4. At present, the output voltage of TPS43060 has been raised after plate-making, but the output voltage of HDRV is still a waveform without voltage boost. What's the matter with thisBoost+SR.pdf